How to use the Tcl transcripts generated along with the DDR memory controller IP

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

How to use the Tcl transcripts generated along with the DDR memory controller IP

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Hi guys,

I notice there're seven Tcl transcripts generated automatically when a DDR memory controller IP is generated, it seems these transcripts are used to configure the timing and pin assignment for the controller. I'm new to the external memory interface, I wonder if running all/part of these Tcl transcripts is part of the procedure for setting up the external memory controller before full compilation? Is there a convenient way to run multiple transcripts at a time? Also which document should I read to learn how to use these Tcl transcripts?

Thanks

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