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Hi,
I would like to change several FPGA IO's current strength but without re-synthesis the project. the project is old and already functions "on the field", hence, we prefer to reduce risks as much as possible by not re-synthesis. all relevant I/Os are LVTTL/LVCMOS. is it possible? thanksLink Copied
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Google "altera morphio" and check out the Morph-IO white paper. It might have what you are looking for.
http://www.altera.com/literature/wp/wp_morphio_reconfig.pdf Cheers, Dave- Mark as New
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If you still have the original project database and the Quartus Version installed that generated it, current strength can be changed in the chip editor.
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--- Quote Start --- If you still have the original project database and the Quartus Version installed that generated it, current strength can be changed in the chip editor. --- Quote End --- Thanks for the answers. Which stages of the design synthesis will be changed when using the chip editor to drive different current strength? do i have to use the same quartus version as used in the original generation?
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