Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Problem compiling fft example

Altera_Forum
Honored Contributor II
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I'm trying to compile the fft example. I'm using the command-line suggested in the readme.txt file: 

 

aoc --board pcie385n_d5 --sw-dimm-partition --const-cache-bytes 16384 fft.cl 

 

 

 

but the compile gives an error: 

 

Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "system:system_inst|altera_merlin_slave_translator:fft_system_avs_fft_cra_translator" 

Info (12128): Elaborating entity "system_irq_mapper" for hierarchy "system:system_inst|system_irq_mapper:irq_mapper" 

Error (293007): Current module quartus_map ended unexpectedly 

Error: Flow compile (for project /work/altera/designs/fft/fft_pcie385n_d5/fft/top) was not successful 

Error: ERROR: Error(s) found while running an executable. See report file(s) for error message(s). Message log indicates which executable was run last.
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Altera_Forum
Honored Contributor II
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I believe that this error was probably caused by compiling on a machine with less than the recommended amount of RAM. 

 

I'm guessing that experienced Quartus users get used to seeing this kind of thing?!
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Altera_Forum
Honored Contributor II
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Typically hardware developers designing for new FPGAs check the memory requirements for Quartus II before they get too far down the design path. The memory requirements are driven by multiple things but the density and feature set of the FPGA device plays the biggest role in this. At the bottom of the Quartus II log file there should have been an error stating that the tools ran out of memory.

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