Quartus II Internal Error -- Please Help!

[Altera_Forum]

I am using Quartus II 64 Bit Version 13.0 for my project on the Arria V GX Starter Board. I am designing a transceiver which would accept 1.25gbps stream of data and see if the data violates the 8b/10b encoding scheme. I have created "Arria V Transceiver Native PHY", "Transceiver PHY Reset Controller" and "Transceiver Reconfiguration Controller" modules and am trying to instantiate them all in the top level entity file called "top". However, during simulation I am running into the error given below. I would really appreciate it if someone could help me out with the problem. I can provide more info as necessary.  

   --- Quote Start ---  Internal Error: Sub-system: CUT, File: /quartus/db/cut/cut_arriav_hssi_pcs_coreclk_legality.cpp, Line: 536 local_tx_pcs_atom != NULL Stack Trace:  0x461401: CUT_ARRIAV_HSSI_PCS_CORECLK_LEGALITY::report_rmfifo_mode_bad_rx_coreclk_source + 0xf1   0x461bef: CUT_ARRIAV_HSSI_PCS_CORECLK_LEGALITY::check_pcs_8g_rx_coreclk + 0x29f   0x461d8b: CUT_ARRIAV_HSSI_PCS_CORECLK_LEGALITY::are_coreclk_connections_valid + 0xcb   0x85b56: hssi_fpp_create_module + 0x192c6   0x1c3e6: FSV_U2B_POSTFIT::operator= + 0x8226   0x12ee1: fsv_execute + 0x2a11   0x13c45: fsv_execute + 0x3775   0x104f2: fsv_execute + 0x22   0xb959: fmain_start + 0x7e9   0x2225: Legacy_fitter_Init + 0x11b5   0x1ea8: Legacy_fitter_Init + 0xe38   0x2e68: Legacy_fitter_Init + 0x1df8   0xf8a6: TclInvokeStringCommand + 0xc6   0x112a8: TclEvalObjvInternal + 0x328   0x121b5: TclEvalEx + 0x8d5   0x12d48: TclEvalObjEx + 0x2d8   0x1abbd: Tcl_EvalObjCmd + 0xfd   0x112a8: TclEvalObjvInternal + 0x328   0x56917: TclExecuteByteCode + 0xe47   0xa2376: TclObjInterpProcCore + 0x76   0x112a8: TclEvalObjvInternal + 0x328   0x56917: TclExecuteByteCode + 0xe47   0xa2376: TclObjInterpProcCore + 0x76   0x112a8: TclEvalObjvInternal + 0x328   0x121b5: TclEvalEx + 0x8d5   0x7c117: Tcl_FSEvalFileEx + 0x1d7   0x7a626: Tcl_EvalFile + 0x36   0xbd5f: qexe_ipc_progress_bar_name + 0xf3f   0x11498: qexe_get_command_line + 0x1068   0x147a5: qexe_run_tcl_option + 0x585   0x1dacd: qcu_run_tcl_option + 0xb8d   0x14dbd: qexe_process_cmdline_arguments + 0x54d   0x14f21: qexe_standard_main + 0xa1    0x4ae8: msg_exe_fini + 0x58   0x522c: msg_exe_fini + 0x79c   0x1524: MEM_SEGMENT_INTERNAL::~MEM_SEGMENT_INTERNAL + 0x194   0x5e0f: msg_exe_main + 0x8f    0x1652c: BaseThreadInitThunk + 0xc   0x2c520: RtlUserThreadStart + 0x20   End-trace  Quartus II 64-Bit Version 13.0.0 Build 156 04/24/2013 SJ Full Version  --- Quote End ---  

[Altera_Forum]

One of the possible root causes of this IE is that your design contains Receiver Only channel with Rate Match being turned on. Rate Match FIFO is clocked by the clock from the transmitter channel of the same physical location, therefore, if the use of Rate Match FIFO is intended, you will need to create a duplex channel. Otherwise, just disable the Rate Match FIFO. 

Let me know if this works.

[Altera_Forum]

Hello leeping82, 

 I was able to fix the issue exactly as you mentioned!    --- Quote Start ---  One of the possible root causes of this IE is that your design contains Receiver Only channel with Rate Match being turned on. Rate Match FIFO is clocked by the clock from the transmitter channel of the same physical location, therefore, if the use of Rate Match FIFO is intended, you will need to create a duplex channel. Otherwise, just disable the Rate Match FIFO. Let me know if this works.  --- Quote End ---