In what ways is the altlvds megafunction block used in design without protocols.

[Altera_Forum]

As far as I understand, the transceivers have a PCS and PMA and the SERDES is always a part of them, in the PMA. The SERDES can be made by using altlvds blocks, one for the transmitter and another for the receiver. 

Now when are going to use high speed signal transmission, we shall have to use things like transceiver reconfiguration controller (to set it's analog attributes correctly), bit error correction, 8b/10b encoding, scrambling, gearbox e.t.c. It comes down to the actual communication standard. But many of such blocks are always there to ensure disparity, CDR and a lot of other things.  Under what circumstances do people use altlvds SERDES on its own, without a PCS and without the communication implemented through a communication standard like Ehtnernet, PCIe e.t.c?

[Altera_Forum]

Note that altlvds logic Stratix IV and all V series has completely different dedicated logic than the high-speed serdes(PMA/PCS). It is designed for high-speed LVDS interfaces, common in ADC/DACs, chip-to-chip, etc.