How to write(or read) soft IP registers with ARM DS-5?

[Altera_Forum]

I have started working on Cyclone V SoC development board. Using golden reference design and bare-metal program, I have succeeded to print 'Hello' in ARM DS-5. Now I want to modify the same hello.c code so that I can write into a PIO register, which is there in the QSYS design.  

 For Nios processor, that would be easier as I just had to use, for example, IOWR(pio_base,offset,1). How can I do the same for ARM processor? Is there any function, like IOWR, for it? (Tired of searching about it on net)   In DS-5 debugger window, it shows avalon registers and their address. So, I can have the address of PIO but I can't figure out how can I access the PIO or for that matter any register of any peripheral IP.  (I am working on Windows OS)

[Altera_Forum]

Dear ashishdevre9, 

 Examine socal.h (SoC Abstraction Layer) in your Baremetal_Helloworld_HWLib_GNU project. Use alt_read_word / alt_write_word functions.  See for details the following location in your installed Altera directory: file:///C:/altera/13.0sp1/embedded/ip/altera/hps/altera_hps/doc/socal/html/index.html  Regards,  V.ZS.

[Altera_Forum]

Thanks voroshazi. Your reply certainly helped.  

 Though, the problem was something else.  I was directly accessing PIO, without performing some required initial procedures.  Actually, Hard Processor(HPS) communicates with soft IPs(on FPGA fabric) through HPS_to_FPGA bridge or LW_HPS_to_FPGA bridge. And DS5 communicates with FPGA soft IPs through HPS. To access soft IPs of FPGA fabric using HPS, these bridges must be initialized first.  For example, my HPS is connected with my PIO through LW_HPS_to_FPGA bridge, then I need to first initialise this bridge and then the PIO can be accessed after while. The bridge initialisation code is there in Altera_SoCFPGA_HWLib_GNU project.

[Altera_Forum]

Hi ashish, 

 I have to work on a similar requirement, i have to communicate to the PIO function from the ARM HPS, i will be using the HPS2FPGA AXI bridge, but i will be using the baremetal application. I am not completely aware of the Baremetal developmental flow, can you share me the example design whatever you had done to communicate to the 'PIO from ARM. Also any Baremetal details so that i can build on top of it.  Regards, Chethan T V

[Altera_Forum]

Hi, 

 I'm facing a similar problem. I would like to know if there is a simple way to obtain the base adresses of the different soft IP cores in a system.   In a NIOS system there would be a 'system.h' that lists all the base adresses. I can't find something similar for the SOC devices.  I'm programming a bare metal application, so using the Linux device tree would be a bit difficult.  Regards, Aldridge

[Altera_Forum]

I think the good starting point is the Altera_SoCFPGA_HWLib_GNU example. 

 If you would like to know the parameters of FPGA slave peripherals from a single header file e.g the base addresses, irq numbers, etc. you have to generate a "system.h" header file (~ similar to BSP/system.h generated by Nios II EDS). These system parameters can be used in ARM DS5 dev. environment. You must use HSP-FPGA interface bridges, and these bridges must be enable (they are in reset state by default - see the above example design for enabling them).  Generating system.h in one step: sopc-create-header-files $SOPCINFO_FILE --module $HPS_MODULE_NAME --single $SYSTEM_HEADER_FILE  in case of GHRD:  sopc-create-header-files soc_system.sopcinfo --module hps_0 --single system.h  regards,  ZS.V.

[Altera_Forum]

Thanks voroshazi, 

 That was exactly what I was looking for.  Regards, Aldridge

[Altera_Forum]

Hello Everyone, 

 I have been trying to get the Hardware Lib example to run but this error shows up when debugging.  +reset system ERROR(TAD43-NAL52):  # in C:\Users\surabhig\Documents\DS-5 Workspace\Altera-SoCFPGA-HardwareLib-FPGA-CV-GNU\debug-hosted.ds:4 while executing: reset system ! Failed to reset device Cortex-A9_0 ! Cannot attain state requested. ERROR(CMD656): The script C:\Users\surabhig\Documents\DS-5 Workspace\Altera-SoCFPGA-HardwareLib-FPGA-CV-GNU\debug-hosted.ds failed to complete due to an error during execution of the script Target has been reset Execution stopped at: S:0x00002FA4  Anybody knows what the reason could be?  I'm using Arrows SoC kit and have followed the steps from the documentation. Any suggestions/insights are welcome.  Thank you, Surabhi

[Altera_Forum]

Best way in this once situation -- close DS-5, in Task Manager remove application with longer name with *-rtti.exe, repower kit, and rerun DS-5, reboot of computer not need. 

Only if it stable retries, debug settings is incorrect. I add to 2nd page on Debug Configurations filename to download hwlib.axf, and it has been loaded also in .ds-script after u-boot-spl, and system hangs in this way  always.

[Altera_Forum]

--- Quote Start ---  Best way in this once situation -- close DS-5, in Task Manager remove application with longer name with *-rtti.exe, repower kit, and rerun DS-5, reboot of computer not need. Only if it stable retries, debug settings is incorrect. I add to 2nd page on Debug Configurations filename to download hwlib.axf, and it has been loaded also in .ds-script after u-boot-spl, and system hangs in this way  always.  --- Quote End ---    I import the example，altera-socfpga-hardwarelib-fpga-cv-gnu，in the DS-5，but when I bulid the project,some problems come out. the problems are ： always_inline function might not be inlinable [-werror=attributes] make: *** [alt_cache.o] error 1  Do you know how to slove these problems？ Thank you！

[Altera_Forum]

Please zip your project folder and include to message ! 

If all source files is as in Altera-s archive, no problems may be !

[Altera_Forum]

I post a new thread.but I can not upload the zip because the zip is considered as invalid file in this website.

[Altera_Forum]

It was my mistake.Now I can upload the project folder. 

 Is there any problem in the project？

[Altera_Forum]

May be insert hwlib.zip to separate yesterday special thread! :) 

 Your sources is equivalent with my, however Makefile is different with parameters "2095 05.07.14 05:36". But my DS-5 compile all your sources! My console output is attached. Difference in command line is only in include files path: my installation is on C:/, your -- on D:/ . It is troubles with your installation of SoC EDS. What version of SoC EDS is installed ? Really 13.1 ? May be near other versions, confuse all processes through PATH ? Try variants:  - search all files named "arm-none-eabi-gcc.exe" on your computer (my unique copy lie in C:\altera\13.1\embedded\host_tools\mentor\gnu\arm\baremetal\bin\, attached also). If other copies exist, need know, what copy is runned in Makefile: may add copying compiler command to Makefile, change $(OBJ): %.o: %.c Makefile $(CC) $(CFLAGS) -c $< -o $@ to: $(OBJ): %.o: %.c Makefile copy $(CC) d: $(CC) $(CFLAGS) -c $< -o $@ and compare resulted d:\arm-none-eabi-gcc.exe with my attachment;  - compare your D:/altera/13.1/embedded/ds-5//../ip/altera/hps/altera_hps/hwlib/include catalog with my 3rd attachment;  - reinstall SoC EDS to C: drive;  - upload and probe new version 14.0: available on Altera site.

[Altera_Forum]

Hello, WitFed! 

I have the same problem. what do you mean:   --- Quote Start ---   I add to 2nd page on Debug Configurations filename to download hwlib.axf  --- Quote End ---   I choose u-boot-spl.axf in Target Configuration, and choose hwlib.axf in Files. However, the problem still here. Would you please give a more detail description about the debug configuration?   Thanks a lot !! Chsin

[Altera_Forum]

All Altera-s examples starts OK if DS-5 is installed correctly. 

If touch something, then may be problems. Now I have unchanged configuration for Altera-SoCFPGA-HardwareLib-FPGA-CV-GNU: 1st page of Debug Configurations select Cyclone/Baremetal/A9_0, USB-Blaster, USB-1; 2nd page cleared; 3th page "Connect only", script "debug-hosted.ds". Last all is strange: filename of hwlib.axf not present, "main" not set for stop, and all loaded and stopped on main(). In .ds first runs u-boot-spl.axf, then it stops on function spl_boot_device() and loads big program hwlib.axf, make "start" command -- and DS-5 show it main() in debug progress. These sheme of debug in all -GNU examples, and she work! If is questions for "problem still here", zip and include here your project, in detail describe it.  P.S. Very strange: all ARMCC projects examples using direct link to .axf-file in 2nd page of "Debug Configurations...", and -GNU-projects slyly loads .axf in .ds-file, and why not present equally methods of download programs to debugger? I try load -GNU with direct method and stop in main() -- not always work.

[Altera_Forum]

I compile the project with your arm-none-eabi-gcc.exe and still have problems. 

the console message shows in console1.txt.  "系统找不到指定的文件" means the system can not find the specified file.  then I reinstall DS-5 in C:driver and compile the project, more problems come out. the console message shows in console2.txt.  I think, maybe the problem is the environment variables of the project proerties. I copy all the environment variables of the project in the environment.txt. could you please compare my environment variables with yours and find out what different between them?Or what‘s wrong in my environment variables.  Thanks!

[Altera_Forum]

My environment variables very similar with yours, and only my version SoC EDS is 14.0 ! 

Try download it from Altera site -- what if Chinese OS problems solved from October ? What is your OS ? Need be 64-bit for 14.0.  In console1.txt need be add ".exe" to first using of "arm-none-eabi-gcc": this is filename of copying exe-file for comparing. And first command of 2 stops, 2nd not runned.  For console2.txt see: alt_cache.c compiled succsessful, may be troubles in alt_clock_manager.c# includes. Need be find compiler key in order to put to console all# include files with its path, or leave common file after preprocessor. If the same .exe runs with the same files and key options, result MAY BE the same ! :) Need be search differences in all input files. You may try these experiments on other PCs and OSes ? If rearrange .c-files in Makefile -- many compiled OK ? HelloWorld-examples is compiled normal ?

[Altera_Forum]

I install SOC EDS 14.0 and the sample application is complied successfully with no error but some warnings！ 

I think the warnings can be ignored. Thank you for your help and patience！

[Altera_Forum]

I install SOC EDS 14.0 and the sample application is complied successfully with no error but some warnings！ 

I think the warnings can be ignored. Thank you for your help and patience！

[Altera_Forum]

Its best and good, only on my PC and SoC EDSs all Altera GNU-examples compiled without warnings!  

Where is guarantee, what next experiments not cause understand errors ? How of Altera examples from 13.1, 14.0 and http://www.altera.com/support/examples/soc/soc.html you try compiling ? Include .txt with warnings, if you not touch original Makefile.