Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20704 Discussions

Video output for SoC

Altera_Forum
Honored Contributor II
1,635 Views

Hi, 

 

I am wondering if there are some reference designs for implementing a frame buffer for the Linux part in the FPGA fabric of a Cyclone 5 SoC (to get e.g. an DVI output). 

 

If not: Has anybody done this? 

 

- The frame buffer itself should be easy, but how complex is the driver on Linux side? 

- Is there any 2D graphic acceleration (e.g. for text output) required? 

- Any other comments? 

 

Regards, 

 

Thomas
0 Kudos
5 Replies
Altera_Forum
Honored Contributor II
522 Views

Dear Tentner, 

 

Till now I have found only one VIP based reference design for Terasic/Arrow SoCKit (not for Altera Cyclone V SoC board, but the FPGA is the same). 

 

See the following link: 

http://www.rocketboards.org/foswiki/projects/sockitvideoipvipreferencedesign 

 

The above ref design is available on the terasic website after free registration. (~100 MB) 

 

I hope it will be help. 

 

regards 

 

V.Zs.
0 Kudos
Altera_Forum
Honored Contributor II
522 Views

Hi voroshazi, 

 

thanks for the link. However, as I understood, the frame buffer is only accessed by the application software via some dedicated accesses. It is not a "real" frame buffer for Linux where e.g. boot messages would be displayed or x-server could be used (I should mention that my Linux knowledge is quite basic). Correct? 

 

Regards, 

 

Thomas 

 

www.entner-electronics.com - Home of EEBlaster
0 Kudos
Altera_Forum
Honored Contributor II
522 Views
0 Kudos
Altera_Forum
Honored Contributor II
522 Views

Thanks, this looks great! 

 

Thomas 

 

www.entner-electronics.com - Home of EEBlaster
0 Kudos
Altera_Forum
Honored Contributor II
522 Views

This provides the integrated frame buffer with Altera's flavor of Linux and DirectFB: 

http://www.rocketboards.org/foswiki/projects/directfbgraphicsonhelioviewlcd
0 Kudos
Reply