Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16599 Discussions

Editing an existing Megafunction

Altera_Forum
Honored Contributor II
1,120 Views

I am trying to edit the the altera_pcie_av_hip_avmm Megafunction to simply change the BAR size field that is established when the Megafunction is generated by the Wizard. 

Editing the existing Megafunction seems like the low risk approach. Then I can remove the old Megafunction and replace it with the edited one... connect it in as it was and  

re-generate. 

 

The problem I have is I can't find what file I need to edit . There is a check selection for only files generated by the Wizard ... that didn't seem to help. 

The altera_pcie_av_hip_avmm comes with the Altera tools when installing ... I can see the altera_pcie_av_hip_avmm when it is selected from a library  

from QSYS. - 

 

I also tried generating the altera_pcie_av_hip_avmm from scratch but was only able to find a starting Megafunction that was streaming when I wanted to use the memory- 

mapped interface. 

 

Any suggestions appreciated.  

 

I need to change the BAR size since I am constrained by the SOC ( ARM ) memory map in the rc . PCIe memory is mapped to 0x0800_0000 - 0x08FF_FFFF or similar and 

I need a BAR size that supports it. Currently the BAR size indicates bit29 and I would like to recuce it to bit28.
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
382 Views

I just need to change the BAR size from 256MB down to 128MB ... for some reason the configuration space works but the two BAR's in the sample with the  

Arria V starter kit return a status of UR ( unsupported request ) , when I try to read internal memory or DMA status registers that are accessed vie the BAR's  

 

I am in the middle of probing the chipselect decoded by the PCIe mega function to see if the internal memory or DMA slaves are even getting selected which 

I suspect they are not. 

 

My other approach is to get the simulation up that I also need to do . The PCIe probe and analyzer ( LeCroy ) indicates the MemRD is going out to the correct address 

but we get a completion with no data and status of UR. Is there any config status that would indicate the reason for the UR status ? 

 

Also, when I tried to move the address from 0x0800_0000 to 0x1000_0000 for the internal memory address map in the design, the BAR registers somehow 

automatically changed to A(31..29) from A(31.. 28) ... since writing 0xFFFF_FFFF returns 0xE000_0000 when it previously returned 0xF000_0000 from the BAR's 

indicating size ... 

 

Any ideas appreciates.
0 Kudos
Altera_Forum
Honored Contributor II
382 Views

On some research, it seems the COMMAND register of the endpoint , bit 1 needs to be set for the endpoint to respond to memory requests .  

I have no device driver active at this time , so that may make sense. I am writing a Lauterbach .cmm script first to exercise the endpoint before 

getting a simple device driver going ( Linux ), to work with our exerciser running on Linux. 

 

I am planning to review the simple device drivers for Altera PCIe endpoints with MM to see what basic device configuration takes  

place during the pcie_init.
0 Kudos
Altera_Forum
Honored Contributor II
382 Views

It looks like I can edit or copy an existing Megafunction ... using the Megafunction Wizard, but when I'm done, I don't see how to reference the new function from the QSYS system. 

 

Any ideas? Ideally I would like to copy and existing function , then edit it. 

 

Thanks BCD
0 Kudos
Reply