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JTAG Configuration - conf_done pin always low, even pull-up

Altera_Forum
Honored Contributor II
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After Board power-on, the conf_done pin which is also 10k pulled-up to 3.2V, but the pin is stick to low.  

the pull-up is not working for this pin.  

 

No short to GND. After power-on device, 16.5 Ohm is measured. 

It looks conf_done pin still alive, but this pin can not be pulled-up?  

doing just JTAG Configuration with USB Blaster on Cylone3 device.  

All setting and conditions included powers are fine for JTAG Configuration. 

 

Device or the pin is broken? Is there a missing for a configuration for this pin? 

 

Any suggetions would be appreciated. 

 

Vraifluss
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Altera_Forum
Honored Contributor II
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I'm just shooting in the dark, but are the M0,1,2 pins connected correctly? Does your device have an exposed pad on the bottom? Are you sure it's connected to gnd?

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

I'm just shooting in the dark, but are the M0,1,2 pins connected correctly? Does your device have an exposed pad on the bottom? Are you sure it's connected to gnd? 

--- Quote End ---  

 

 

>> 

M0,1,2,0 is set to "0000" and sure it is not short to gnd. you means the conf_done pin is open? 

hwo to check? 

 

Jtag chain debugger has detected lots of fpga , even using one fpga. 

Assumed the pull-up failure of conf_done pin cause the multi device detectd over jtag chain
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Altera_Forum
Honored Contributor II
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M0,1,2,3 = 0000 means passive serial configuration. Is that what you want? By "exposed pad" I mean a large copper area on the bottom of the physical IC package. If your part has an E144 package it has an exposed pad which MUST be connected to ground. Failure to do so will result in strange configuration errors.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

M0,1,2,3 = 0000 means passive serial configuration. Is that what you want? By "exposed pad" I mean a large copper area on the bottom of the physical IC package. If your part has an E144 package it has an exposed pad which MUST be connected to ground. Failure to do so will result in strange configuration errors. 

--- Quote End ---  

 

 

The config_done will go high when all devices are configred successfully in the JTAG chain.
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Altera_Forum
Honored Contributor II
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The msel0123 ("0000") is set for only Jtag configuration. is it correct? 

The device is 324pin BGA Package and No Expsoed pad. 

Does BGA Soldering fail? or still configurations fail?.  

The problem is that the pin cannot pull-up with external circuits.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

The msel0123 ("0000") is set for only Jtag configuration. is it correct? 

The device is 324pin BGA Package and No Expsoed pad. 

Does BGA Soldering fail? or still configurations fail?.  

The problem is that the pin cannot pull-up with external circuits. 

--- Quote End ---  

 

 

1. JTAG configuration dosen't need to be set anything. 

2. config_done doesn't go high is not because of external circuit. 

3. How many devices in your jtag chain?
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Altera_Forum
Honored Contributor II
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1. spec says msel should be gnd(0000) for JTAG Configurtion. it looks fine. 

2. Doubt the BGA soldering on conf_done pin. because pull-up itself is not working. 

3. Total 70 Devices are detected included the last EP3C25F device as shown. 

Checked the configurations on pull-up/down with device(3.3V IO) and USB Blaster (3.3V Power) and VCCA, VCCINT, VCCIO. 

all looks folow the spec. Determining the resodering the Device. Any suggestions ?
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

1. spec says msel should be gnd(0000) for JTAG Configurtion. it looks fine. 

2. Doubt the BGA soldering on conf_done pin. because pull-up itself is not working. 

3. Total 70 Devices are detected included the last EP3C25F device as shown. 

Checked the configurations on pull-up/down with device(3.3V IO) and USB Blaster (3.3V Power) and VCCA, VCCINT, VCCIO. 

all looks folow the spec. Determining the resodering the Device. Any suggestions ? 

--- Quote End ---  

 

 

1. JTAG configuration can be implemented without any settings. 

2. What you mean "looks fine"? Is it mean that you can program fpga thru JTAG correctly? 

3. How many fpga devices in your single jtag chain? One or multiple?
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

1. JTAG configuration can be implemented without any settings. 

 

--- Quote End ---  

 

 

Hi, I also thought this as the handbook seems to indicate this, but in the past someone has posted here with a similar problem and finally the problem seemed to be a "invalid" i.e. not specified configuration of the MSEL pins. Seems like the better interpretation is "JTAG can be used for every MSEL configuration of the specified ones"..  

Just as a sidenote :-)
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