altlvds_tx with manual delay chain ?

[Altera_Forum]

I have been trying to setup an LVDS output where I can control the delay chain. ie: I want to output at 1GHz with manual phase control. 

 Since I want to run the output at 1GHz, I am using the altlvds_tx to drive the output signal. So far so good. Now I connect it to an altiobuf in differential mode. Still no problem.   Now, I enable the altiobuf option "Enable output buffer dynamic delay chain1". When I try to synthesize, quartus says: Error (21199): LVDSOUT port of LVDS DPA atom "arriav_serdes_dpa1" must be fed by output pin that does not feed any other logic  Looking in the code quartus generates in the db/ folder, I see that indeed the lvds serdes is fed through a dpa component. I do not need or want dynamic phase alignment. I want to explicitly control the delay chain buffer. I tried directly instantiating arriav_ir_fifo_userdes, but quartus refuses to let me connect it without feeding the signals through an arriav_serdes_dpa.  How can I convince quartus to run the serdes blindly and let me control the delay chain?  PS. I know I can also achieve phase control by shifting a PLL, but that gets me at most 1GHz/8=125ps granularity whereas the delay chain approach offers 50ps.

[Altera_Forum]

When you say manual, do you mean manually picking a setting, or dynamic, whereby you can load in different values in system? If it's the former, I believe you can do it with I/O assignments in the Assignment Editor. I'm not sure about the latter. 

(For the error message, I'm guessing the block is called DPA, even if it's not doing DPA, but the real issue is the legality check for what can be connected to it. I would be surprised if there is an easy way around it.)

[Altera_Forum]

--- Quote Start ---  When you say manual, do you mean manually picking a setting, or dynamic, whereby you can load in different values in system?  --- Quote End ---   Sorry, I should have been more clear. I intend to load different values to the delay chain dynamically.  I also had a problem where I could not attach the outputs of a reconfigurable PLL directly to the altlvds_tx. Quartus did not like that connectivity either, but there was a work-around where I could put a arriav_pll_lvds_output inbetween to appease quartus. I was hoping there might be a similar solution/work-around for the altlvds_tx and altiobuf.