Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16598 Discussions

Logic Elements size differs without changing source

Altera_Forum
Honored Contributor II
1,629 Views

Our project was compiled with Quartus 9.1 SP2 Build 350 two years ago. When recompiling the same source with the same Quartus version again I see differences between the output from two years ago and what I compiled today. The logic element size differs about 2% (98% two years ago and 96% now). Because of this difference the POF is also different. This worries me not being sure if the output is correct. I haven't found a post on the forum. Has anyone seen the same problem? And more important is there a solution or explanation?

0 Kudos
6 Replies
Altera_Forum
Honored Contributor II
601 Views

Has ANYTHING changed in the source (even just a version number)?  

have you changed any project settings, pin assignments or device? 

Are you compiling on the different OS (Windows and Linux give different results for the same version)? 

 

I suspect something has changed, as the exact same source code with the exact same tool version with exact same settings will always create the same pof and sof files.
0 Kudos
Altera_Forum
Honored Contributor II
601 Views

Nothing has changed. The source files are stored in SourceSafe and fetched before compilation. Before the compilation a DIFFERENCE check reports no change but afterwards the POF, SOF and RPT files are different. Project/compiler settings in the RPT file are the same though. I even tried different computers running Windows XP and Windows 7. Same result.

0 Kudos
Altera_Forum
Honored Contributor II
601 Views

Is Quartus reusing the results from a previous compile? I found out that even if incremental compiling isn't enabled, compiling from a project folder that already has a compiled project will produce a different result than a clean project folder (removing the db and incremental_db folders is enough to "clean" a project). 

If you are regenerating a SOPC Builder or QSYs project before you compile the Quartus project and are using a system id component, it will also produce a different result each time because the timestamp date and system ID code will be different. It shouldn't generate a change in logic usage though.
0 Kudos
Altera_Forum
Honored Contributor II
601 Views

The logic usage will change slightly because the optimiser will find a different solution to the timing problem.

0 Kudos
Altera_Forum
Honored Contributor II
601 Views

After fetching the source files the project was compiled for the first time. But that triggered me. I really do not know if the checked-in source files were the result of a clean compilation two years ago. This needs further investigation. 

I was aware of the timestamp and system ID which is annoying when comparing the output.
0 Kudos
Altera_Forum
Honored Contributor II
601 Views

It sounds like all the generated files were also checked in. IMHO, generated files should not be checked into version control, as you can easily get missmatches between source code and generated files (the exception being I would usually put the programming files into a tag for easy download/programming of the board).

0 Kudos
Reply