- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I was wondering if a simulation model excised for the Cyclone III device being programmed via passive serial. I am using the Cyclone III and using the MAX II device to auto program the FPGA from flash. I am trying to simulate my MAX II design, I found a model for the flash, but I need a model for the configuration pins on the FPGA.
If you know where one exists, I would greatly appreciate it. Thanks.Link Copied
5 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I've never seen one. We've typically used a CPU or MPU when using pasive serial mode, so we tended to just played with it, until we got it to work.
One gotcha in some of the families is the 2 extra DCLKS clocks required from CONFIG_DONE to USER Mode start. So that's where several people get stuck. Pete- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- I was wondering if a simulation model excised for the Cyclone III device being programmed via passive serial. I am using the Cyclone III and using the MAX II device to auto program the FPGA from flash. I am trying to simulate my MAX II design, I found a model for the flash, but I need a model for the configuration pins on the FPGA. If you know where one exists, I would greatly appreciate it. --- Quote End --- Here's a pretty simple one that I use. My PS/FPP controller has a programmable byte-count, so I just make it smaller for simulation. If you've hard-coded your controller byte-count, then you can change the generic on the model. The model uses an enumeration so that you can view the configuration stages. Cheers, Dave
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thank you for the replies. We are trying to use the PFL mega function in the MAX II device. I will use the file provided to help in our debugging process. Thanks again.
Have you had any experience using the PFL to program the FPGA in passive serial mode? I thought it would just work, but we seem to be having issues. The file is stored in flash. Thanks! Angela- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Angela,
--- Quote Start --- Have you had any experience using the PFL to program the FPGA in passive serial mode? I thought it would just work, but we seem to be having issues. The file is stored in flash. --- Quote End --- When PFL was introduced, it could not be targeted to anything but MAX II, and it did not have a simulation model, so I wrote my own controller. If PFL has a simulation model now, then I'd recommend reviewing the simulation to try to determine the issue. Cheers, Dave- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
That is what we are doing now. Thanks for the help!
Angela
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page