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Worst case Tpd value changing

Altera_Forum
Honored Contributor II
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My simple programme tpd value is different from my previous compilation. 

Im using the same code and device family but dnt knw wats the cause of this variation. 

Previously had 5ns. Now im getting 8.8ns. 

 

 

Pls help...:(
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Altera_Forum
Honored Contributor II
518 Views

You may well see different results each time thanks to the way Quartus can use random seeds for compilation. More importantly, have you constrained your design? Quartus will aim to achieve the timing you require, providing you've supplied it. How important is the worst case tpd if the design meets your requirements? 

 

Regards, 

Alex
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Altera_Forum
Honored Contributor II
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The design is without constraints. If the tpd is unstable, don't that mean the design have problems?  

Since functional sim is not real life implementation.
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Altera_Forum
Honored Contributor II
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The fact that some timing delays are unstable doesn't mean that your design has problems per se, as long as they are all within your tolerances. The problem is that if you don't constrain your project, Quartus has no idea what kind of timing performance you require, so will try to make some educated guesses. As it uses a pseudo-random algorithm for the fitting part, as Alex just said, it can generate completely different results from even a tiny change in the design. If you need more timing stability, and to be sure that your design will run within your timing requirements, you need to constrain your project.

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Altera_Forum
Honored Contributor II
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Try to use a sdc file to constraint you clock (assuming you have one) in your design. I think you'll see more stable results.

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