Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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SignalTap II won't recognize recompile

Altera_Forum
Honored Contributor II
1,871 Views

Hi All, 

 

I have an instance of signaltap I've been working with in my design for the last couple weeks. Last Friday I recompiled the project after a design change and now signaltap won't recognize any recompiles, and constantly is telling me my design has changed and a new compilation is necessary. I had changed a few nodes, and never had any problem with that before. I've verified that the correct .stp file is being applied to the design in settings, and I've tried clearing the db and incremental_db before compilation as well. Does anyone know what might be causing this behavior from SignalTap, what I may have done to cause it, and/or how to fix and prevent this problem from occurring?
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Altera_Forum
Honored Contributor II
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Just a few ideas on what to check. Where are you programming the FPGA from, programmer or SignalTap window? Does the path indicated point to the programming file with the most recent time stamp? Also, after programming the FPGA, if you check the System tab in the Messages window, does it show that the device was successfully programmed? If you have a config device and programming via JTAG fails, it may default to what's in the config device which won't match SignalTap.

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Altera_Forum
Honored Contributor II
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So the problem had gone away for a while and I hadn't checked this forum thread, but it has appeared again and I'm still not sure what the resolution might be. The programmer succeeds in programming the FPGA (I also programmed the image into my configuration device in case that was the problem). So the JTAG interface is up and recognized, QII says that the device has been programmed, the DB and project were cleaned up, the timestamps all match, but it still tells me the design has changed immediately after the compilation finishes and I program the device. I had no problem working with SignalTap yesterday, and when I came in this morning I started getting this error (no changes made). The computer didn't restart, it was in the same state I left it in last evening. Is there a cause for this problem that anyone is aware of?

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Altera_Forum
Honored Contributor II
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I some time will get into similar issue with SignalTap. What I do is remove the existing SignalTap and recreate a new SignalTap. Probably you could give it a try and see if it works.

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Altera_Forum
Honored Contributor II
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Instead of recreating the SignalTap file, which can be quite an amount of work try the following: 

 

Close SignalTap 

Open the .stp file in an editor 

Look for the line "<instance enabled="true" entity_name=...." 

If the entity_name is anything else than "sld_signaltap", e.g. it is prefixed by something, this can be the problem. Replace it by entity_name="sld_signaltap". 

Save the stp file and recompile the project. Now you should see in the Quartus Hierarchy view the instance "sld_signaltap:<instance_name>" and everything should work
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