HPS-to-FPGA Interrupts

[Altera_Forum]

Has anyone here any experience from using HPS-to-FPGA Interrupts? I have custom IP-blocks that should receive interrupt signals from Linux (HPS). I guess that the HPS's GIC cannot send interrupts to FPGA. So I should use for example the FPGA Manager for this? Are there any example designs available that use HPS-to-FPGA Interrupts?

[Altera_Forum]

Hi, 

The GIC interrupt controller is a function of the ARM core and is designed to handle incoming interrupts. If you want to have the FPGA handle interrupts from the HPS, you should connect the HPS interrupt output to an interrupt input on a Nios II. If you can be more specific about your particular interrupt scenario, I may be able to give you more detailed guidance. Regards, Sue

[Altera_Forum]

Custom IP-block may receive interrupt after writing to special register in bus address space. 

For HPS it is simplest way.

[Altera_Forum]

--- Quote Start ---  Custom IP-block may receive interrupt after writing to special register in bus address space. For HPS it is simplest way.  --- Quote End ---    Sorry but I didn't understand what you meant with "special register in bus address space". Could you explain this more specific? Do you mean that HPS should write to some register in custom IP-block via LW-bridge and the custom IP-block should read this register?

[Altera_Forum]

Yes, block may "hear" writing operation in the same tact and interprete as interrupt. 

Some IP-blocks have slave AMBA&Avalon interfaces for control it from HPS -- it read/write registers, in that way may be realized interrupting.