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Hi all,
I am wondering if a compressed raw binary file actually reduces the configuration time? I found in the document configuration, design security and remote system upgrades in cyclone v devices (http://www.altera.com/literature/hb/cyclone-v/cv_52007.pdf) on page 16 the statement: "Compressing the configuration data reduces the configuration time. The amount of reduction varies depending on your design." When using the Fast Passive Parallel configuration mode with a compressed configuration file, I have to use a DCLK-to-DATA ratio of 4 (according to the cyclone v device datasheet (http://www.altera.com/literature/hb/cyclone-v/cv_51002.pdf) page 47). Doesn't that mean that my compressed configuration file must be at least 75% smaller than my normal configuration file to achieve a reduction in configuration time? But in the first document it says that the compression typically reduces the size of the configuration file by only 30% to 55% (page 30). Doesn't that mean that I will not achieve a reduction in configuration time and will even end up with a longer configuration time in the typicall case? Am I right here or do I forget something?Link Copied
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In FPP case unfortunately it takes longer to configure compressed file:(
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In the FPP with compression, typically the external host need 4x DCLK cycle to latch a byte into the FPGA (DCLK-to-DATA ratio of 4). In this case, the configuration time is expected longer.
You can consider to use the PFL with enhance bitstream compression and decompression feature to reduce the configuration time in FPP mode. For FPP with enhanced bitstream decompression enabled, the DCLK frequency is ×1 the data rate, thus the configuration time should be shorter. You can refer to the details from the PFL user guide: https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_pfl.pdf
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