Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Transceiver simulation

Altera_Forum
Honored Contributor II
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Hi, 

I just design a Basic X4 bonded transceiver by using ALTGX MegaWizard. I also wrap it with a transceiver reset module designed based on Spec requirement as well as an altgx_reconfig.v module included. 

Well, next step is to write a simple test bench to generate parallel interface transmitting data. I connect the serial transmitting port to receiving port. In simulation wave form window i can see everything is going well except the data at parallel receiving output is always "9c9c9c9c9c9c9c9c", control signal byte is "11111111", never changed. Why? Any one can help? 

 

Very appreciated! 

 

Yaoting
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Altera_Forum
Honored Contributor II
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Also, i found from waveform window, the rx_disperr signal and Err_detect signal show the channel 0 and channel 1 abnormal, why?

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Altera_Forum
Honored Contributor II
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When i send K28.5 for all channels the transceiver works. It looks like it needs initialization or synchronization before it works properly. Is it the answer? 

But, still, there is an issue that the output of receiver side has byte shift. it is shown in attached screen shot. Why? How to avoid it? Thanks.
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