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modelsim vlog error syntax error, unexpected IDENTIFIER, expecting clocking

Altera_Forum
Honored Contributor II
‎10-15-2014 06:48 PM
4,103 Views

I cannot compile one of my verilog files in modelsim altera edition. I get this error using the global primitive.  

# ** Error: (390): near "b2v_inst1": syntax error, unexpected IDENTIFIER, expecting clocking 

 

global b2v_inst1( .in(LCLK1), .out(g_lclk1_c0)); 

 

Any ideas on how to fix ? 

 

Thanks.
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Altera_Forum
Honored Contributor II
‎10-16-2014 06:50 AM
2,489 Views

"global" is a SystemVerilog keyword.

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