- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I want to generate a sine wave with lut approach in verilog using Spartan6 FPGA. How do I generate those values? what should be the difference between the angles and how to determine the number of table entries ? Thanks in advance.
Link Copied
1 Reply
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I'd use Microsoft Excel or similar to generate your sin values. The more entries in the table (and the wider the entries) the more accurate your sin wave will be.
You might also look at this post: http://www.alteraforum.com/forum/showthread.php?t=31850 Cheers, Alex PS. A word of warning - I suspect Sp****n6 is a bit of a swear word on an Altera forum...:oops:
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page