WM8731 slave mode BCLK signal always low

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

WM8731 slave mode BCLK signal always low

1,158 Views

I am using the audio codec shield made for arduino (https://www.sparkfun.com/products/11290) with a DE0-NANO development board.

I am measuring the signals with a usbee AX pro

In the attached picture you can see that the I2C communication is working and ADDA_LCR signal is 44.1 KHz

The chip is configured to run in slave mode so the signals need to come from the FPGA.

I also attached the code i am using now

Link Copied

0 Replies

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.