Where can find "Bare metal C++ example project for Cyclone V SoC Dev Kit" ?

[Altera_Forum]

hi,  

 Does anybody know how to create a "bare-metal hello world C++ project" that can running on Cyclone V SoC Dev Kit ?   I have create a new C++ project from DS-5 IDE, after modify some project properties can build successfully.   But after using DS-5 debugger, it will cause system reset.... I don't know how to solve this.   Can someone help ?  Many thanks in advance.  ====================================================================== Create C++ project flow:  1. (SoCEDS 14.1)Embedded command shell   2. open ds-5 (@ eclipse &)   3. File->New Project-> Hello World C++ Project, ToolChain = GCC for ARM bare-metal. Named project as "gccbm"  4. Right-click on project "gccbm", select "Properties"  5. Expend "C/C++ Build", In "Tool settings" sheet   - GCC C++ Compiler\ = arm-altera-eabi-g++   \Target = cortex-a9  - GCC C++ Linker \ = arm-altera-eabi-g++  \Image : set Link Script = C:\altera\14.1\embedded\host_tools\mentor\gnu\arm\baremetal\arm-altera-eabi\lib\cycloneV-dk-ram-hosted.ld   

[Altera_Forum]

Console message of "Cyclone V SoC Dev Kit" : 

 U-Boot 2013.01.01 (Jan 14 2015 - 13:14:15)  CPU : Altera SOCFPGA Platform BOARD : Altera SOCFPGA Cyclone V Board I2C: ready DRAM: 1 GiB MMC: ALTERA DWMMC: 0 SF: Read data capture delay calibrated to 3 (0 - 7) SF: Detected N25Q512 with page size 65536, total: 67108864 In: serial Out: serial Err: serial Net: mii0 Hit any key to stop autoboot: 0 SOCFPGA_CYCLONE5# undefined instruction pc : [<ff001014>] lr : [<3ff8d791>] sp : 3ff35638 ip : 3ffaa5b8 fp : 00000001 r10: 3ffa2b7a r9 : 3ffac4bc r8 : 3ff35f60 r7 : 00000000 r6 : 00000000 r5 : 00000000 r4 : 00000000 r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : 00000000 Flags: nZcv IRQs off FIQs off Mode SVC_32 Resetting CPU ...  resetting ...

[Altera_Forum]

After some modification, now I can do DS-5 Debugging....  

 1. Add a new debug script (debug-hosted.ds), (attached)  - Run preloader first (semi-host enabled)  - Run gcc_bm.axf  2. Modify debug-configuration  - Debugger Sheet:  Run Control : Connect Only  Run target initialization debugger script: debug-hosted.ds

[Altera_Forum]

You have questions or make sample for us ? 

I download 2 your files, unzip, import in DS-5, try to compile -- see error:   --- Quote Start ---  make: *** No rule to make target 'gcc_bm.axf', need by 'all'. Stop.  --- Quote End ---    For making any my new projects I use Altera-s examples: need be rename old names in ".cproject" and ".project", "Makefile". Renaming of .c-file to .cpp usually is not disturb.

[Altera_Forum]

hi WitFed, 

 Firstly, I am asking someone to provide an example.  And, I have trying to create one for by myself.   I am putting the correct PROJECT in the post as attachment.

[Altera_Forum]

[environment] 

Tool: SoCEDS 14.1 & DS-5 AE  KIT: Cyclone V SoC Dev Kit  [Step]   1. download "C:\altera\14.1\embedded\examples\hardware\cv_soc_devkit_ghrd\output_files\soc_system.sof"  2. Open DS-5, Import project "mycpp_proj"  3. Build project  4. DS-5 set Debug Configuration  Run Control: Connect Only  Run Debug initilization scription: debug-hosted.ds