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Good day! I collect my system using: nios nco, fir and cic filters. In my case I use dsp-processor for control nco. NCO require AvST bridge, so I decided to use fifo between nios and nco.
First, I decided to make such system: NIOS, which store code frequency for nco (32 bits word), when fifo (I use it like a bridge AvMM-AvST) and second fifo (as bridge AvST-AvMM). In this system I want to write one word to fifo and read it, but have some problems and also simulate it in Modelsim. But I have some problem - you can see my word didn't read/write via fifo. I suggest there are some problem in the code - may be I didn't adjust fifo correctly. I use fifo's API: 1) altera_avalon_fifo_init – init fifo 2) altera_avalon_fifo_write_fifo – write to fifo 3) altera_avalon_fifo_read_fifo – read from fifo My code:
/*
* main.c
*
* Created on: 26.02.2015
* Author: Roman
*/
//Includes# include "io.h"# include "altera_avalon_fifo_regs.h"# include "altera_avalon_fifo_util.h"# include "system.h"# include "sys/alt_irq.h"# include <stdio.h># include <stdlib.h># define ALMOST_EMPTY 2# define ALMOST_FULL FIFO_0_IN_CSR_FIFO_DEPTH-3
int main(){
//reset the fifo's irq history register
altera_avalon_fifo_clear_event(FIFO_0_IN_CSR_BASE,
ALTERA_AVALON_FIFO_EVENT_ALL);
//First FIFO (AvMM - AvST)
int b = 0xab;
//initializes the FIFO wr
altera_avalon_fifo_init(FIFO_0_IN_CSR_BASE, //the base address of the FIFO control slave
0, //the value to write to the interruptenable register
ALMOST_EMPTY, //the value for the almost empty threshold (порог) level
ALMOST_FULL); //the value for the most full threshold level
//write a, b into fifo
altera_avalon_fifo_write_fifo(FIFO_0_IN_BASE, //the base address of the fifo write slave
FIFO_0_IN_CSR_BASE, //the base address of the fifo control slave
b); //value to write to address
//read a,b from fifo
altera_avalon_fifo_read_fifo(FIFO_0_IN_BASE, //the base address of the fifo read slave
FIFO_0_IN_CSR_BASE); //the base address of the fifo control slave
//Second FIFO (AvST - AvMM)
//initializes the FIFO
e = altera_avalon_fifo_init(FIFO_1_IN_CSR_BASE, //the base address of the FIFO control slave
0, //the value to write to the interruptenable register
ALMOST_EMPTY, //the value for the almost empty threshold (порог) level
ALMOST_FULL); //the value for the most full threshold level
//write d into fifo
g = altera_avalon_fifo_write_fifo(FIFO_1_OUT_BASE, //the base address of the fifo write slave
FIFO_1_IN_CSR_BASE, //the base address of the fifo control slave
d); //value to write to address
//read e,f from fifo
h = altera_avalon_fifo_read_fifo(FIFO_1_OUT_BASE, //the base address of the fifo read slave
FIFO_1_IN_CSR_BASE); //the base address of the fifo control slave
return 0;
}
I will glad to hear all your advices.
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Does anybody work with FIFO in Nios, using API?
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hello ,
my nios II/e have to write on my Fifo. i don't have a probleme with Qsys or Quartus. my problem is the c program on nios eclipse. Can you help me ?
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