Is it possible to get GHz frequency in Altera FPGA for PCI Express 1.0, 2.0?

Altera_Forum · ‎03-31-2015

I have seen that from the ALTPLL i am able to generate 1.4 GHz in Cyclone IV GX and 1.6 GHz in Stratix IV GX FPGA where as in Stratix V ALTPLL wont allow to generate any clocks.

According to PCI Express standards:

1.0 requires 2.5 GHz PCI clock frequency, 2.0 requires 5 GHz, is it possible to generate that frequency in any altera FPGA? Kindly elaborate.

Whereas Xilinx Zynq 7000 pll provides freq range of 1.6 GHz to 3.3 GHz.

And i have heard that by using channel bonding at the lower frequency (100-150 MHz), data rates of Gb/s can be acheived is that true?

*

Thank you for your time.

Regards.

Altera_Forum · ‎05-24-2015

Hi,

The PCIe Gen 1 and Gen 2 in Stratix V devices are supported using transceivers and transceiver TX PLL ie CMU PLL and ATX PLL. You could directly use the PCIe Hard IP to configure your interface for PCIe. The Hard IP will help to instantiate the TX PLL for you.