Hello!
I am trying to simulate a dummy module acting as an ADC that should respond in the same way as the real ADC I am using. I do this since the real ADC has not yet arrived and I would like to validate that my module which reads from the ADC is working correctly. The testbench for use in ModelSim has been set up in exactly the same way as the others but when I try to run RTL Simulation I get the following error message:
Error: Top level entity/module name for test bench not specified -- cannot continue NativeLink simulation
WINDOWS 2 {Cannot find the file.}
Error: NativeLink simulation flow was NOT successful
As stated before the testbench is set up in the same way as other testbenches with the exception that this one does not go into simulation. I get no error messages during compilation.
Best regards,
David
