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Is it possible to configure the EPCS device through FPGA via JTAG only?

Altera_Forum
Honored Contributor II
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From reading the Configuring the Cyclone Devices document i came to the conclusion that to write to the EPCS flash device , respective MSEL pin connections must be set for AS configuration mode for the FPGA. 

My steps to configure the FPGA would be, in the AS Configuration Header, i would connect a USB blaster cable. 

Convert the .sof file to .pof file. Compress it. 

In the Programmer window select the .pof file and select AS mode in the type of configuration. 

Program/Verify the dumped file. 

And the FPGA is running after successful dowload. 

 

So I wanted to know if, .sof file is sent to the EPCS through via FPGA through JTAG and what would be the steps? 

And is it possible to send .pof file through JTAG to EPCS? 

 

Thank you for your time.
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Altera_Forum
Honored Contributor II
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EPCS devices are 'standard' SPI flash (read the data sheets on the Micron web site). They can be programmed using two common methods; 

 

1. Active Serial Mode 10-pin header. 

 

If your board has a 10-pin header for Active Serial programming, you can configure Quartus to generate a programming file for the EPCS device on your board, and program it using the AS header. 

 

2. JTAG indirect mode. 

 

In this mode, Quartus configures the FPGA with a simple configuration image that allows it to issue SPI flash programming commands. You use Quartus to create a JTAG indirect programming file, and then download that image to the board. There are examples of how to use this method in most development kit user manuals. 

 

If you are designing a new board, then just make sure to include the 10-pin JTAG header. Don't bother to include an AS header, since JTAG indirect mode works well. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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Hi,  

 

Yes you can program the EPCS via JTAG interface from the FPGA using the SFL (Serial Flash Loader) method. If you already have a FPGA connected to the EPCS, you just need to use the FPGA JTAG pins to program the .jic (JTAG Indirect Configuration) file into the EPCS.The steps are documented in the AN370 from this link: 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/an/an370.pdf 

 

Regards, 

Nyusof
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