Cyclone V SOC - SOCKit - all HSMC pins are high during FPGA config loading

[Altera_Forum]

I am trying to figure out why all the HSMC pins are high during boot from the SD Card up until the FPGA configuration is loaded? This takes several seconds.  

 I'm trying to interface the SoCKit to a custom board where some of the pins are configured as inputs on the SoCKit. I'm worried that when the FPGA config is being loaded and the output pins are held high, that it will burn up the output pins on the custom board we have.   Does anyone else have this problem? Is there a way to change the default configuration of the FPGA pins before it loads its configuration so they are all high impedance inputs?

[Altera_Forum]

This is a problem that has caught me out on too many occasions. I should have learnt by now. Some FPGAs (cough Xilinx cough) have an input pin which dictates what the pins do on power up / programming. I'm sure some Altera devices do too though I haven't come across one myself. 

 Solutions: 

• Redesign your circuitry so all pins are active low. 
• Add pull down resistor to override pull up in chip. If I remember correctly this has to be around 2k2. 

[Altera_Forum]

The pre-configuration pullups on the SoC seem to be weak, and the outputs don't source much current. I haven't run into any problems, but check the data sheets to make sure.