CPLD as a pass through (Input pin directly goes to Output pin) good or bad idea?

Altera_Forum · ‎05-29-2015

Hi everyone,

I have a custom board created by another person. The board contains a Netburner processor that is connected to a CPLD. The CPLD is then connected to a DDS.

The DDS uses a SPI interface and the Netburner is able to send SPI commands, however, there is a CPLD in between these two devices. The person who created board

has the idea that we can use the CPLD as a pass through device, where we simply connect the Input to the Output.

However, after reviewing the schematic, the SPI clock is NOT connected to a dedicated clock input and uses a regular I/O pin.

My understanding is that in good designs we have to first register any inputs that goes into a CPLD/FPGA device. In this case, I won't be able to do that because the clock is not

attached to a clock tree and altera will bark at me if I specify it as a clock. My CPLD also contains another external clock but it runs a lot slower than the Netburner SPI clock (10 MHz vs 66 MHz).

I haven't tried and I'm about to, but for my learning sake why do I have a gut feeling that this isn't a good idea? I think I've tried it before where I don't register my inputs (other than asynchronous resets) and the data would get attenuated or lose power as it propagated in my design.

Altera_Forum · ‎05-29-2015

Using the CPLD as a pass-through device should work fine.

The only potential issue you might face is different propagation delays of the SPI signals, however, you can solve that issue by simply using a slower SPI data rate.

Cheers,

Dave

Altera_Forum · ‎06-01-2015

Hi,

The use of the clock tree will only be critical when you are running very high speed. Sometimes the QII will failed fitter due to user not using the dedicated clock tree but I remembered that we can always use altclktrl to move them to the clock tree.

Also it is not necessary all the time to use clock tree. In your case, I don't think you will need any dedicated clock pin. As mentioned by dwh, you can just run at slower SPI data rate.