How to enforce the used DATA input of a LUT?

Altera_Forum · ‎06-05-2015

Hi,

I am implementing a Physically Uncloneable Function with Ring-Oscillators (RO) on Cyclone IV FPGAs. Each RO consists of 16 LCELLs, placed in the 16 LEs (i.e. LUTs) of another LAB.

With set_location_assignment LCCOMB_X..._Y..._N... -to ... commands in my qsf file, I am able to customize which LUTs are used for which LCELLs.

However, I am not able to customize which LUT input (DATAA, DATAB, DATAC or DATAD) is used for each LUT. The quartus compiler seems to have its own reasons for this, leading to different routing within the different ROs.

I was hoping the "Look-Up Table Buffer Primitives" would give me controll over this:


module lut_function (a,b,c,d,o);
    input a,b,c,d;
    output o;
    wire aw,bw,cw,dw,o;
    lut_input lut_in1 (a, aw) ;
    lut_input lut_in2 (b, bw) ;
    lut_input lut_in3 (c, cw) ;
    lut_input lut_in4 (d, dw) ;
    lut_output lut_o (aw || bw || cw || dw, o) ;
endmodule

But apparently this does not enforce that input a is really routed through DATAA of the LUT and so forth. The compiler seems to mix it up at will.

So my question is, if there is a way to actually enforce which LUT data input is used?

Thanks and best regards!

Altera_Forum · ‎06-05-2015

Interesting. Is this research into PUFs in an FPGA, or creating a product that needs it? Just curious.

I think an .rcf is the only way to go. Back-annotate down to the routing level. Either assignments -> Back-Annotate, but if routing isn't available do "quartus_cdb --back-annotate=routing <project_name>". For more info, run "quartus_sh --qhelp".

This will back-annotate every location to the .qsf and every route to an .rcf. You're going to have to manually rip out what you don't want, and then with the .rcf modify it to use the input you want. Note that there is some wildcarding in .rcfs which might help.

Altera_Forum · ‎06-05-2015

Thanks for the quick reply. My interest is purely research related at the moment!

I know about the back-annotation feature. This allows me to fix the changes I manually make to the rounting. However, to get these changes in the first place, I still have to go through the process I just described in my other post here http://www.alteraforum.com/forum/showthread.php?t=48732, right?

This is not really viable. Imagine I want to implement ROs in ALL LABs of the Cyclone IV to see if there are manufacturing caused biases. An then I might even want to play around to see the effects of using deliberately using different LUT data inputs. This cannot be done by hand (not even by one of my students... ;-)

But maybe, instead of having script create the changes.tcl file for me (as suggested in my other post), I could build a script to modify or create the .rcf file, as you suggested. I will have a look at this.

Thanks again.

UPDATE: On second thought, the rcf-file includes ALL routing, regardless of whether it is the compiler's original choice or already customized. So it should be possible to have a script crawl through the rcf-file and make the appropriate changes! Will definitely give that a try now!

Altera_Forum · ‎06-05-2015

Try creating a quartus.ini in the project directory and add the following:

vpr_wysiwyg_atom_ports=on

This is an old setting to prevent LUT input switching. It only works on the whole design and makes it more difficult to route. It hasn't been updated and I believe causes no-fits in Arria 10. I recommend against it for real designs, but might be what you need for your testing. There's a chance it won't work, cause a no-fit, etc., but just thought it worth a try. Anyone else following this thread with a real design, please don't use it...:)

Altera_Forum · ‎06-08-2015

It wasn't public yet, but FPGAs are starting to have PUFs in them. This is the high-end product coming out:

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/wp/wp-01252-secure-device-manager-for-fpga-soc-security.pdf