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I am using Quartus 13.0 with Altera DE2 development board. I generated a 1-port RAM in MegaWizard, and enabled the "In-system Memory Content Editor". The compiler gives the error message:
"Error (15684): M4K memory block WYSIWYG primitive "XYZ:XYZ|altsyncram:altsyncr am_component|altsyncram_asc1:auto_generated|altsyn cram_t682:altsyncram1|ram_block3a1" utilizes the dual-port dual-clock mode. However, this mode is not supported in Cyclone II device family in this version of Quartus II software. Please refer to the Cyclone II FPGA Family Errata Sheet for more information on this feature." The error is gone when I disable the Memory Content Editor. We tried another project, (same platform) , which had a MegaWizard ram and it works fine. So I doubt the part of the message "is not supported in Cyclone II device family in this version of Quartus II software". I couldn't figure out what setting(s)/option(s) I need to change. They both seem to have similar setup. Can someone help on figuring this out? http://www.alteraforum.com/forum//images/icons/icon11.pngLink Copied
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Hi Linda_4,
In the 2nd project, is it that same CII device is used and if you use the same method to generate the 1-port RAM, there is no error when enabled "In-system Memory Content Editor"?- Mark as New
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As I look at the Cyclone II errata sheet (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ds/es_cycii.pdf), it seems like the M4K issue should be fixed with Quartus II 5.0sp2 or later. It seems strange also as it states that if use single port mode will be always safe.
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@tiny007: Yes. the exact same platform is used (same SW, HW, method to generate RAM)
@nic_@ : I ran into that document earlier. I am using version 13.0. It compiles other projects with RAM perfectly. The problem is repeatable in the sense that both projects behave the same way on a colleague's computer with an older Quartus II (12.0). It seems it's some kind of setting an option here or there. :/
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