Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16556 Discussions

Why the output of this Code is 'U' ?

Altera_Forum
Honored Contributor II
1,028 Views

Hi all 

Why the Sum Value is 'U' in this code ? : 

LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY Adder_4_Bit_2C IS PORT( A, B : IN STD_LOGIC_VECTOR(3 DOWNTO 0); Mode : IN STD_LOGIC; Sum : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); AVF : OUT STD_LOGIC ); END Adder_4_Bit_2C; ARCHITECTURE Structure OF Adder_4_Bit_2C IS COMPONENT FullAdder_1_Bit IS PORT( X, Y : IN STD_LOGIC; CIn : IN STD_LOGIC; FSum : OUT STD_LOGIC; COut : OUT STD_LOGIC ); END COMPONENT; COMPONENT XORGate IS PORT( X1, X2 : IN STD_LOGIC; Y : OUT STD_LOGIC ); END COMPONENT; SIGNAL COut_Temp : STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL XB : STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN B_0 : XORGate PORT MAP(Mode, B(0), XB(0)); B_1 : XORGate PORT MAP(Mode, B(1), XB(1)); B_2 : XORGate PORT MAP(Mode, B(2), XB(2)); B_3 : XORGate PORT MAP(Mode, B(3), XB(3)); SUM_0 : FullAdder_1_Bit PORT MAP (A(0), XB(0), Mode, Sum(0), COut_Temp(0)); SUM_1 : FullAdder_1_Bit PORT MAP (A(1), XB(1), COut_Temp(0), Sum(1), COut_Temp(1)); SUM_2 : FullAdder_1_Bit PORT MAP (A(2), XB(2), COut_Temp(1), Sum(2), COut_Temp(2)); SUM_3 : FullAdder_1_Bit PORT MAP (A(3), XB(3), COut_Temp(2), Sum(3), COut_Temp(3)); AVF_COut : XORGate PORT MAP(COut_Temp(2), COut_Temp(3), AVF); END;  

 

Sum , COut_Temp and AVF are 'U' ! , why ?!? 

 

I Simulated this code with Model-Sim and Forced values of A, B and M but all Outputs are 'U' ! 

 

thanks ...
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
315 Views

'U' implies they are uninitialised - ie. they have not yet been assigned a value.  

Trace back the connections to see why.
0 Kudos
Altera_Forum
Honored Contributor II
315 Views

That is Output and mapped to Out port of adder , when A and B and Mode have value , Sum should have value too , Is it correct ?! 

I have tested that and Sum shown Output , then I closed project and opened another project with Model-Sim , And Opened this project again and now there is no output !
0 Kudos
Altera_Forum
Honored Contributor II
315 Views

You haven't posted the adder code, nor the test bench code, so I have no idea what should happen. Did you actually run the simulation?

0 Kudos
Reply