Node instance "tcm_address_w_check" instantiates undefined entity

Altera_Forum · ‎07-03-2015

Hello.

I am using Quartus 13.1 and Qsys.

I can build my project using verilog, qsys and NIOS previously.

But I added the clock component at pll in qsys.

I had error at build of quartus (using verilog):

Error is "Node instance "tcm_address_w_check" instantiates undefined entity"

I can generate qsys whih have no error.

But building quartus had error.

I checked system contents in qsys, I can not find tcm_address.

I am appreciate, if you suggest this issue.

Best regards,

Altera_Forum · ‎07-03-2015

Check into the design hierarchy where it is being instantiated. You can trace the error in analysis&synthesis messages sequence.

Altera_Forum · ‎07-03-2015

"But I added the clock component at pll in qsys."

Mind further elaborate on what does it referred to by adding clock at PLL?

Altera_Forum · ‎07-03-2015

Thank you for responding.

I used Avalon_ATTPLL.

I used Edit. At Output/Clock tab, I set c3 and c4 clock data.

And I build the connection to dualport RAM at system components in qsys.

Best Regards,