Hello,
We have three different evaluation boards: Helio, the Altera SOC Cyclone V boards, and the Sodia board.
We modified the golden design found in the
Rocketsboard.org web-site for each of these boards by adding to the golden design QSYS system an Avalon master that reads data from the HPS-sdram.
The same Avalon Master works correctly on the Helio board, but we can't get to transfer data on the other two boards.
All of them connect to the f2h_sdram0_data port of the HPS module. All the golden design systems had a "fpga_only_master" module connected to this HPS port. So there are two Avalon components connected to this port.
We are running the Poky Linux 80 kernel 3.13.0 on all these boards, and we are using the same device driver on all these boards.
I hope somebody can help us determine what is the issue for the Altera SOC Cyclone V and the SODIA boards.
Thanks
