- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hey, I've written a simple counter code
When the cnt = 5 the signal std_logic_vector Inc +'1' Now I want you end this process when It's equal to "1111"; Everytime I try to end this I see In the waveform simulation the it just beginning from" 0000" again. What can I do?Link Copied
7 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Why not post the code and be a more descriptive of the problem.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Entity VCO is
Port(sw:in std_logic; Clk:in std_logic; Bit_4: out std_logic_vectot(3 downto 0)); End entity; Architecture behave of VCO is Signal cnt: integer range 0 to 50000000:=0; Signal f_out: std_logic_vector(3 downto 0):=x"0"; Begin Process (clk) Begin If sw = '1' then If clk 'event and clk=' 1' then Cnt<=cnt+1; If cnt=5 then F_Out<=f_out+'1'; Cnt<=0; Elsif cnt=5 then If f_out="1111" then F_out<="1111" Cnt<=0; End if; End if; End if; Elsif ='0' then Cnt<=0; F_out<="ZZZZ"; End if; End process; Bit_4<=f_out; End;- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I want when f_out="1111"
The counter will stop end remain on "1111" Instead of looping end start counting from 0000 again- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
What is F_F_out - it's not declared in your code.
Assuming this is a typo - then your code will never have f_out locked at "1111" because the only situation where you check for "1111" also resets cnt. maybe you need the if f_out = "1111" then To have the highest prirotiy. On a side note - why have you got the sw signal as an asynchronous enable? this is bad practice - it should be a synchronous enable.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I've tried this it didn't work..
It shows me in the simulation the same thing And I don't have sw signal It is a toggle sw for on/off use- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Tried what? I dont see any new code.
Have you tried this:
Process (clk)
Begin
If clk 'event and clk=' 1' then
Cnt<=cnt+1;
if f_out /= "1111" then
If cnt=5 then
F_Out<=f_out+'1';
Cnt<=0;
Elsif cnt=5 then
If f_out="1111" then
F_F_out<="1111"
Cnt<=0;
End if;
End if;
end if;
End if;
End process;
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Tried what? I dont see any new code. Have you tried this:
Process (clk)
Begin
If clk 'event and clk=' 1' then
Cnt<=cnt+1;
if f_out /= "1111" then
If cnt=5 then
F_Out<=f_out+'1';
Cnt<=0;
Elsif cnt=5 then
If f_out="1111" then
F_F_out<="1111"
Cnt<=0;
End if;
End if;
end if;
End if;
End process;
--- Quote End --- Thanks man! It worked I don't know how I didn't think about "/=" inequality
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page