Problem of Qsys Design for D5m Camera on DE2-70

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Problem of Qsys Design for D5m Camera on DE2-70

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Hi, Guys.

i am working on video processing using d5m camera with de2-70. i am using qsys generation and nios 2 c code programming but i found a problem that altera does not hv pin planner pin for camera_if port. Is it a must to use verilog code to perform d5m camera set up?

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