if CycloneV SX transceiver support the SD SDI or ASI of MPEG2 interface at 270mpbs ?

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CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

if CycloneV SX transceiver support the SD SDI or ASI of MPEG2 interface at 270mpbs ?

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hi ,

I'm using CycloneV-5CSXFC5D6F31C8 , and test tranceiver using ASI interface which is MPEG2 standard interface at 270Mpbs, now rx is OK ,but tx fails. By datasheet i see the clock recovered from CDR when rx,but tx serial clock is generated by PLL using clock division factor. when setting tx date rate at 270Mpbs, there is an error that the tx data rate is in the range of 611Mpbs to 1638Mpbs.

in anoter data sheet I found the tranceiver support HD SDI and 3G SDI ,but no hint to SD SDI , so I doubt if the CycloneV-5CSXFC5D6F31C8 support the SD SDI and ASI of 270Mbps?

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