signaltap - show as a vector and not as bits

[Altera_Forum]

When I look for a signal vector (VHDL) the Signaltap finds me the signal as 31 different bits, so I have to add each bits, then group them together, etc. Not so comfortable. 

Is there a way I can see the signal as a vector and not as bits?

[Altera_Forum]

They should be accessible as pre-synthesis signals.

[Altera_Forum]

--- Quote Start ---  They should be accessible as pre-synthesis signals.  --- Quote End ---   Great, thanks!