Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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No exact pin location assignment

Altera_Forum
Honored Contributor II
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I have made the following assignment in QSF using the pin assignment editor of Quartus-II. FPGA device is Stratix-V 5SGSMD4H1F35C1 

 

set_location_assignment IOBANK_3A -to sink_N 

set_location_assignment IOBANK_3B -to sink_data 

set_location_assignment IOBANK_4B -to source_data 

set_location_assignment IOBANK_4A -to source_exp 

set_location_assignment IOBANK_7A -to source_N 

set_location_assignment IOBANK_3A -to source_ready 

set_location_assignment IOBANK_4B -to source_sop 

set_location_assignment IOBANK_4B -to source_valid 

set_location_assignment IOBANK_4B -to source_eop 

set_location_assignment IOBANK_3A -to sink_ready 

set_location_assignment IOBANK_3A -to sink_sop 

set_location_assignment IOBANK_3A -to sink_valid 

set_location_assignment IOBANK_8A -to Reset 

set_location_assignment IOBANK_8C -to Clock 

set_location_assignment IOBANK_3A -to sink_eop 

 

 

Got warnings for all pins reporting " Pin --- not assigned to an exact location on the device" 

Some warnings are reported below.  

 

 

Info (169086): Pin sink_data[0] not assigned to an exact location on the device 

Info (169086): Pin sink_data[16] not assigned to an exact location on the device 

Info (169086): Pin sink_ready not assigned to an exact location on the device 

Info (169086): Pin source_N[0] not assigned to an exact location on the device 

Info (169086): Pin source_N[1] not assigned to an exact location on the device 

Info (169086): Pin source_N[2] not assigned to an exact location on the device 

Info (169086): Pin source_N[3] not assigned to an exact location on the device 

Info (169086): Pin source_N[4] not assigned to an exact location on the device 

Info (169086): Pin source_N[5] not assigned to an exact location on the device 

Info (169086): Pin source_N[6] not assigned to an exact location on the device 

Info (169086): Pin source_N[7] not assigned to an exact location on the device 

Info (169086): Pin source_N[8] not assigned to an exact location on the device 

Info (169086): Pin source_N[9] not assigned to an exact location on the device 

Info (169086): Pin source_N[10] not assigned to an exact location on the device 

Info (169086): Pin source_N[11] not assigned to an exact location on the device 

Info (169086): Pin source_data[0] not assigned to an exact location on the device 

Info (169086): Pin source_data[1] not assigned to an exact location on the device 

Info (169086): Pin source_data[2] not assigned to an exact location on the device 

Info (169086): Pin source_data[3] not assigned to an exact location on the device 

Info (169086): Pin source_data[4] not assigned to an exact location on the device 

Info (169086): Pin source_data[5] not assigned to an exact location on the device 

Info (169086): Pin source_data[6] not assigned to an exact location on the device 

Info (169086): Pin source_data[7] not assigned to an exact location on the device 

 

 

Could you please suggest how to clear the warnings and fix the issues?
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Altera_Forum
Honored Contributor II
3,925 Views

every single data bit has to be be assigned to a specific pin, not just IOBANKS

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Altera_Forum
Honored Contributor II
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The fitter has done this exact pin assignment itself inside the IOBANKS as this is an experiment and the FPGA has not connected to any board. If its to be done manually, how to do this in a simple way.

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Altera_Forum
Honored Contributor II
3,925 Views

Well, like you have in the original post - these are only warnings saying you have not assigned pins - not errors. 

You could try assigning all outputs to virtual pins if this is only an experiment.
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Altera_Forum
Honored Contributor II
3,925 Views

If you like what locations the Fitter has selected in the I/O banks, you can then back-annotate the locations it has selected to write exact locations to the .qsf file (Assignments menu). 

 

Steve
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