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Hello folks,
I am attempting to compile a kernel that I know in aocl 15.1 will use > 100% logics. Hence I m using AOCL 17.0 and the# pragma loop_coalesce in the hope to reduce the logic utilization. However, the compile failed early on without much indication where it failed. Has anyone seen something similar? It so seems that the compiler auto unrolled even though I specify the loop_coalesce early on. Compiler Warning: Auto-unrolled loop at /home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d//home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d/device/beamform.cl:189 Compiler Warning: Auto-unrolled loop at /home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d//home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d/device/beamform.cl:174 Compiler Warning: Auto-unrolled loop at /home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d//home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d/device/beamform.cl:159 Compiler Warning: Auto-unrolled loop at /home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d//home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d/device/beamform.cl:144 Compiler Warning: Auto-unrolled loop at /home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d//home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d/device/beamform.cl:129 Compiler Warning: Auto-unrolled loop at /home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d//home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d/device/beamform.cl:114 Compiler Warning: Auto-unrolled loop at /home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d//home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d/device/beamform.cl:99 Compiler Warning: Auto-unrolled loop at /home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d//home/shared/examples/nallatech/examples_p385_hpc_a7/beamform4/fft1d/device/beamform.cl:84 0 libLLVM-3.0.so 0x00007f9012016abf 1 libLLVM-3.0.so 0x00007f9012018a32 2 libpthread.so.0 0x00007f90110855e0 3 libLLVM-3.0.so 0x00007f9011a22051 grif::XNodeBarrier::XNodeBarrier(llvm::Value*, grif::XNodeGroup*, grif::XNode::XNodeKind) + 609 4 libLLVM-3.0.so 0x00007f9011a2470c grif::XNodeSimpleBarrier::XNodeSimpleBarrier(llvm::Value*, grif::XNodeGroup*) + 28 5 libLLVM-3.0.so 0x00007f9011ac6a6e grif::XNodeFactory::TranslateLLVMCall_Instruction(llvm::Value*, grif::XNodeGroup*) + 1182 6 libLLVM-3.0.so 0x00007f9011ac8892 grif::XNodeFactory::TranslateLLVMInstruction(llvm::Value*, grif::XNodeGroup*) + 1634 7 libLLVM-3.0.so 0x00007f9011ac8ac4 grif::XNodeFactory::Create(llvm::Value*, grif::XNodeGroup*, acl::BasicBlockLiveIO*) + 180 8 libLLVM-3.0.so 0x00007f901194c775 grif::util::create_netlist_nodes(llvm::Function&, acl::BasicBlockLiveIO*, grif::XNodeGroup*) + 389 9 libLLVM-3.0.so 0x00007f901193ca58 acl::DSDKGenerate::Generate(llvm::Function&) + 584 10 libLLVM-3.0.so 0x00007f901193f383 acl::DSDKGenerate::runOnFunction(llvm::Function&) + 83 11 libLLVM-3.0.so 0x00007f9011940000 acl::DSDKGenerate::runOnModule(llvm::Module&) + 2496 12 libLLVM-3.0.so 0x00007f9012807d71 llvm::MPPassManager::runOnModule(llvm::Module&) + 577 13 libLLVM-3.0.so 0x00007f9012807f1b llvm::PassManagerImpl::run(llvm::Module&) + 187 14 aocl-llc 0x00000000004251c8 main + 5608 15 libc.so.6 0x00007f9010093c05 __libc_start_main + 245 16 aocl-llc 0x0000000000422b79 Stack dump: 0. Program arguments: /opt/intelFPGA/17.0/hld/linux64/bin/aocl-llc -march=griffin -board /opt/intelFPGA/17.0/hld/board/nalla_pcie/hardware/p385_hpc_a7/board_spec.xml -dbg-info-enabled beamform.bc -o beamform.v 1. Running pass 'Generate DSDK netlist and HDL' on module 'beamform.bc'. Error: Verilog generator FAILED. Refer to beamform/beamform.log for details. Thank you.Link Copied
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You can disable the auto unrolling by using "#pragma unroll 1" and see if it fixes your problem. However, if the issue still occurs in the latest version of Quartus/AOC (v17.1), I recommend reporting the issue directly to Altera.
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