pcie/altera_xcvr_native_a10_171/sim/mentor/twentynm_pcs.sv segfault?

FPGA Intellectual Property

PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

pcie/altera_xcvr_native_a10_171/sim/mentor/twentynm_pcs.sv segfault?

1,007 Views

Start time: 17:39:56 on Dec 15,2017vlog pcie/altera_xcvr_native_a10_171/sim/mentor/twentynm_pcs.sv Model Technology ModelSim - Intel FPGA Edition vlog 10.5c Compiler 2017.01 Jan 23 2017 ** Fatal: Unexpected signal: 11. ** Error: pcie/altera_xcvr_native_a10_171/sim/mentor/twentynm_pcs.sv(12): in protected region End time: 17:39:56 on Dec 15,2017, Elapsed time: 0:00:00

Did anybody experience this with modelsim ase in 17.1?

Link Copied

0 Replies

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.