Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20640 Discussions

SDI II Interface Altera

Altera_Forum
Honored Contributor II
1,058 Views

Dear All, Hope you all are well. I would like to have an idea to implement TRS(Timing reference signal) the way SDI II interface has implemented. How to bind those default TRS data with every input using VHDL ? Which function does it support? 

Thanks in advance. 

 

 

Bets regards, 

Nizam
0 Kudos
0 Replies
Reply