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Cyclone III EP3C10F256C6N JTAG TMS TDI internal pull-up power?

Altera_Forum
Honored Contributor II
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Hi 

 

Cyclone III EP3C10F256C6N VCCIO Bank1 : 1.8V 

 

After use PS_MODE to download rbf file. 

The TMS and TDI two pin will have internal pull-up. 

It's seems not pull up to VCCIO1,have some leakage path will cause VCCIO1 to 1.9V 

If I short TMS and TDI to GND, can make VCCIO1 back to 1.8V. 

 

Does any body the detail TMS and TDI internal pull-up circuit? 

Is possible turn off the internal pull-up after download rbf file? 

 

 

Thanks a lot for help 

Albert
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Altera_Forum
Honored Contributor II
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Hi, 

 

Programmable pull-up resistors are not supported on the dedicated configuration,JTAG, and dedicated clock pins. 

Refer page 103:https://www.altera.com/en_us/pdfs/literature/hb/cyc3/cyclone3_handbook.pdf 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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