Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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QII 17.1 tristate controller IRQ -1 problem

Altera_Forum
Honored Contributor II
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Hello! 

 

I use Quartus II 17.1 Standard edition with Stratix IV device. I have to connect LAN91C111 device. I use QSYS with altera_generic_tristate_controller for it.  

After generation system.h file for embedded software development: 

# define ALT_MODULE_CLASS_Lan_controller altera_generic_tristate_controller# define LAN_CONTROLLER_BASE 0x10000# define LAN_CONTROLLER_IRQ -1# define LAN_CONTROLLER_IRQ_INTERRUPT_CONTROLLER_ID -1# define LAN_CONTROLLER_IS_ETHERNET_MAC 1# define LAN_CONTROLLER_LAN91C111_DATA_BUS_WIDTH 16# define LAN_CONTROLLER_LAN91C111_REGISTERS_OFFSET 768# define LAN_CONTROLLER_NAME "/dev/Lan_controller"# define LAN_CONTROLLER_SPAN 65536# define LAN_CONTROLLER_TYPE "altera_generic_tristate_controller" 

 

How I can set:  

 

LAN_CONTROLLER_IRQ_INTERRUPT_CONTROLLER_ID 0 

LAN_CONTROLLER_IRQ 2 

 

 

in the QSYS program, the signals to the interrupt controller are connected and the interrupt is set to 2, but in system.h interrupt controller -1 and IRQ -1 

 

how can I fix it? 

 

UART is connected to IRQCONTROLLER also and it has parameters like this in system.h 

# define LOG_UART_IRQ 0# define LOG_UART_IRQ_INTERRUPT_CONTROLLER_ID 0 

 

The problem is altera_generic_tristate_controller only... 

 

 

 

in the QSYS program, the signals to the controller are connected and the interrupt is set to 2
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Michael_Kress
Beginner
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I am having the same problem with a altera_generic_tristate_controller not exporting the IRQ and controller id.  When I generate the BSP (in Nios), I have to manually edit system.h to insert correct values.

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