Bare Metal App fails after some time

AShiv · ‎09-25-2018

Hi,

So first some basic info:

DE0-Nano-SoC

Quartus 18.0

ARM DS-5 5.28.1 Ultimate Edition

I am trying to create a baremetal application, but I seem to be running into some issues. I had been using a rather complex baremetal app involving lwip, and I was not attempting to integrate the FPGA section of my code. However, upon doing that the app would seem to crash eventually regardless of what I was doing. So I decided to take a step back and try just the FPGA portion instead. I was starting with the AlteraSoCFPGA-HardwareLib-FPGA-CV-ARMCC example found included with the Altera EDS, however I ran into an issue with that where the debug script would not get past the uboot. It would get stuck in the spl.c file after the spl_boot_device() call it would go into the hang() call, but I can't find the actual spl_boot_device() function to see what the error is... So I thought I'd try swapping their uboot and .sof file with the one I'd eventually be using anyway. I changed the base address for the sysID call and it appears to work! then before letting the function return after completing and cleaning everything I had a simple

while(1) {

i++

}

And that would run for a little while, however it eventually breaks. It always seem to goes to addresses around 0x00000930-60 and just sit in an assembly loop. When pausing execution it only shows it in disassembly, not c code, and the stack just shows "no function name". Which was the same issue I had with the other project. Clearly I am missing some setup part with my FPGA side in my Quartus project. My BSP is set to boot from SDMCC, I don't have anything on my SD Card its un-formatted, but I didn't think I needed to do anything with it unless I was booting from it. Removing it altogether makes no difference. In the commands window upon pausing the app after crashing it states:

"Target Message: memory access caused precise abort.

Debug Precise Abort Registers : DFSR = 0x00000008, DFAR = 0xCee50000"

Its always pretty much the same, though sometimes its 0xCEED0000 instead of 0xCEE50000. I know 0xC0000000 onwards is HPS->FPGA memory space but I'm at a loss to what I am doing wrong. I'd appreciate any assistance thanks!

Ahmed_H_Intel1 · ‎10-09-2018

Hello,

The following page shows you how to create your first Bare-Metal application and boot it from the SD card without any issue:

What you want is to copy the .bin file to the Fat partition of the SD card (see tab 3 Step 6), then you can load the bare metal application into memory from the FAT partition (See tab 3 step 10). Now you can execute the bare metal program as shown in the next step 11.

https://rocketboards.org/foswiki/Documentation/SoCSWWS1IntroToAlteraSoCDevicesLab3BareMetalApplication#Using_the_34dd_34_method

Note: The Cyclone V requires a pre-loader ot operate

This file shows how to get a Bare-Metal design running on CV/AV devices

https://github.com/cambridgehackers/Altera-SoCFPGA-HardwareLib-MPL/blob/master/README.txt

********************************

Building and Booting From SDMMC:

(1) Ensure the preloader header file '[SoCFPGA]/software/preloader/uboot-socfpga/board/altera/socfpga/build.h'

must match the boot selection below. For SDMMC the CONFIG_PRELOADER_BOOT_FROM_SDMMC must

be set to 1 in 'build.h'.

(2) Ensure the preloader header file '[SoCFPGA]/software/preloader/uboot-socfpga/board/altera/socfpga/sdram/sequencer_defines.h'

is either configured for Arria V SoC (set ARRIAV to 1) or Cyclone V SoC (set CYCLONEV to 1).

(3) Build mpl_A5_s-mkpimage.bin or mpl_C5_s-mkpimage.bin. In the following example

instructions will be given for the C5 variation.

(3.1) In DS-5, Clean Project; In Embedded Command Shell or Linux, type make clean.

(3.2) set correct values in <config.mk>:

BOOT_SOURCE ?= QSPI ( SDMMC = Boot from SDMMC, QSPI = Boot from QSPI )

DEVICE ?= C5 ( C5 = build code for C5, A5 = build code for A5 )

COMPILER ?= GNU ( GNU = GCC toolchain, ARM = ARM toolchain )

HANDOFF_BASE ?= [Root directory of FPGA project]

HANDOFF_SDRAM_DIR ?= [Quartus generated files with SDRAM data directory]

HANDOFF_DIR ?= [Preloader generated files directory]

Then in DS-5 click Build Project; in Embedded Command Shell or Linux, type make.

The above gives you a suitable MPL image for the BootROM for booting from SDMMC.

(4) Build your application binary and process it with the mkimage tool to create its image.

Please consult SoCEDS documentation for more information on this step. For the purposes of

this example, application.img will denote the application image.

(5) Open a SoCEDS Command Shell.

Follow the following commands to flash images:

(5.1) Plug in your SD card and determine which partition it is.

Linux: Type "dmesg | tail":

[2736576.121602] sd 15:0:0:0: [sdb] Attached SCSI removable disk

Windows: A new drive letter should be created

(5.2) Flash the MPL image to sdb3 using dd command:

Linux:

>>> sudo alt-boot-disk-util -p mpl_C5_s-mkpimage.bin -a write -d /dev/sdb

Windows: (assuming drive E was assigned)

>>> alt-boot-disk-util.exe -p mpl_C5_s-mkpimage.bin -a write -d e

(5.3) Flash the application.img also to sdb3 after the mpl_C5_s.bin

Linux:

>>> sudo alt-boot-disk-util -b application.img -a write -d /dev/sdb

Windows: (assuming drive E was assigned)

>>> alt-boot-disk-util.exe -b application.img -a write -d e

(6) Adjust the BOOTSEL Jumpers to SDMMC. This is as follows:

-- BOOTSEL0: . [. .]

-- BOOTSEL1: . [. .]

-- BOOTSEL2: [. .] .

(6) Insert the SDMMC card into the DevKit and power up the board.

*************************************

Ahmed_H_Intel1 · ‎11-02-2018

I hope you find this clear, let me know if you have any question related to this.