Inconsistent Active Serial Programming on Start Up

[JVogl]

I have several boards that, theoretically, are exactly the same. They have a Cyclone V GT and both a header for JTAG programming and a header for Active Serial programming. On all of these boards, I have programmed an EPCQ128 chip with the same .pof file. On some of these boards, upon power up, the FPGA is programmed via active serial as expected. On others, it does not.

On the boards that do not program via active serial upon start up, I have noticed some interesting behavior however. I take the USB Blaster cable that I have and disconnect the USB from my computer. As a result, the Blaster cable cannot do any programming now. With my board powered on and the active serial programming not working, I then place my Blaster cable on the JTAG header of my board. As soon as I do this, the active serial begins to work and my board programs.

This behavior is consistent on all of my boards that do not program automatically upon startup. I then did a few further tests to try and narrow down the problem. I physically removed the TMS, TDO, and TDI pins from the JTAG header so that only the TCK pin was still connected when I attached the USB blaster. This did not affect the behavior I saw earlier. After powering on the board, my FPGA would not program until I attached the USB Blaster, that is still not connected to my computer, to the JTAG header.

I probed the TCK pin on this header to see what effect connecting the USB Blaster had. When the Blaster is connected to the header, the TCK pin jumps up to ~2.5V from its previously grounded state.

I then took a look at one of my boards that would program automatically upon startup. The TCK pin on this board always remains grounded. As a result, it does not seem to be a requirement that this pin is driven high in order for my FPGA to program.

Any thoughts on what might be the cause of this behavior or further steps to take?

Any help is much appreciated. Thanks!

[AnandRaj_S_Intel]

Hi,

Do you have pull down resistor on TCK?

Also check the status on nSTATUS, nCONFIG & CONF_DONE.

Is pin connection guidelines taken care?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/cyclone-v/pcg-01014.pdf

If possible can you share the schematic? or you can check with respect to Cyclone V Device Handbook Volume 1.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_5v2.pdf

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)