I210 - Packet loss issues

[MA2]

HI ,

we have used I210 Pcie to Gigabit controller on our board & have followed all the schematics reference and routing guidelines as suggested by intel .

we have also programmed the EEPROM & have detected the Ethernet controller with 1G Link .

we are having high packet loss issues around 35% when transmiting data on this port .

what could be possible area to looked at ?

Thanks in advance.

Murugan

[CarlosAM_INTEL]

Hello, murugan44 :

Thank you for contacting Intel Embedded Community.

In order to be on the same page, could you please clarify us what you mean with "I210 PCIe to Gigabit controller", it is related to the Intel(R) Ethernet Controller I210 or a PCIe add-in card that has the cited Ethernet Controller?

In case that it is an add-in card, could you please tell us if it has been designed by you or a third-party company?

If it is a third-party design, could you please give me all the information related to it?

On another hand, could you please confirm us if it has been reviewed by Intel if it has been developed by you?

Please give us the information that may answer the previous questions.

We really appreciate your collaboration.

Best regards,

Carlos_A.

[MA2]

HI Carlos , Thanks for the response. please find my replies in Bold to your questions.

In order to be on the same page, could you please clarify us what you mean with "I210 PCIe to Gigabit controller", it is related to the Intel(R) Ethernet Controller I210 or a PCIe add-in card that has the cited Ethernet Controller? I210 device was mentioned as PCie to gigabit controller. It is not a add-in card , it is directly mounted on our board.

In case that it is an add-in card, could you please tell us if it has been designed by you or a third-party company? It our own design , not an add-in board

If it is a third-party design, could you please give me all the information related to it? not applicable.

On another hand, could you please confirm us if it has been reviewed by Intel if it has been developed by you? No it was not reviewed by intel , but we have followed all the guidelines mentioned by Intel . If review is compulsory , let me know the procedure or email id to which i can share the schematics & bin files we load on the EEPROM.

I have attached the debug information and bin file as attachment.

Thanks & Regards

Murugan

[CarlosAM_INTEL]

Hello, murugan44:

We really appreciate your collaboration.

Please send your design to be reviewed by Intel using the procedures stated at the https://edc.intel.com/Tools/Design-Review/Default.aspx?language=en Design Review Services website.

We hope that this information may help you.

Best regards,

Carlos_A.

[MA2]

HI Carlos , In addition to the earlier mail , below is another observartion.

if we force the speed on switch to 100mbps / use a switch of 100 mbps , the ping has no packet loss / loss in sequence . we are able to ping with 0 packet loss .

All the 4 diff pairs of gigabit Ethernet are routed in the same guidelines and impedance.

[CarlosAM_INTEL]

Hello, murugan44 :

Thanks for your update.

Based on your previous communications, could you please let us know the length of cable, type of cable, and connection partner?

It is important that this design should be verified by Intel. Due to this fact, please let us know the results of this process as soon as you have it.

Best regards,

Carlos_A.