PCIe SSD pinout queries

[PKann1]

We are designing a system to verify the PCIe 3.0 based SSD

Before that we have some doubts while referring the

datasheet,

1. In Datasheet the pin number 41&43 are shows as PETn0, PETp0. Is this pin details represent device's PCIe TX pair or host system PCIe TX pair should connect here?
2. Similarly the pin number 35&37 are shows as PERn0, PERp0. Is this pin details represent your device's PCIe RX pair or host system PCIe RX pair should connect here?

Kindly clarify the queries.

Thanks & Regards,

P. Rajkumar Kannan.

[idata]

Hello Kannan.tamil87,

Thanks for posting in our communities. We understand that you have queries regarding where or how to configure pins for PCIe based SSDs. This forum is for technical support and general information. For design related questions, please refer to our https://www.intel.com/content/www/us/en/design/resource-design-center.html Resource and Design Center. Best regards,Eugenio F.