DDIO with FPGA

[CWen6]

Hi All,

Since DDIO is enabled by default on Xeon E5 processor, I'm wondering can a FPGA based NIC leverage DDIO technology - sending received data directly to L3 cache instead of memory? Are there any documentation or reference designs, papers regarding this?

Thanks for your help.

[idata]

Hi cwen: Thank you very much for joining the Intel® Processors communities. We will do our best in order to provide the information you are looking for.

I will do further research to provide the most accurate response to your inquiry. As soon as I gather all the data I will post all the details on this thread. Any further questions, please let me know. Regards,Alberto R

[CWen6]

Alberto,

Thanks for your reply. Looking forward to your response.

[idata]

cwen: You are welcome. I just wanted to let you know that I just received some updates on the research we were doing on this matter and based on that information:

Intel Data Direct I/O Technology requires no industry enabling:Intel DDIO is enabled by default on all Intel Xeon processor E5 family and Intel Xeon processor E7 v2 family platforms. Intel DDIO has no hardware dependencies and is invisible to software, requiring no changes to drivers, operating systems, hypervisors, or applications. All I/O devices benefit from Intel DDIO, including Ethernet, InfiniBand*, Fibre Channel, and RAID. Intel® Ethernet products with their high-performing, stateless architecture excel with Intel DDIO:Intel Ethernet products with their intelligent offload architecture take advantage of host-based processing whenever it makes sense from a system-level perspective, balancing performance, power consumption, flexibility, and cost. Intel Ethernet products were designed to take advantage of the improvements in communication between host and network controller that Intel DDIO provides. The industry-leading small packet performance of Intel Ethernet products gets even better with Intel DDIO. https://www.intel.com/content/www/us/en/io/data-direct-i-o-technology.html Also, from the DDIO Q&A, questions and answer # 5: What enabling is required in the IHV ecosystem to take advantage of Intel DDIO? A5: All IHV adapters will benefit from Intel DDIO, though Intel's Ethernet NICs and controllers, with their stateless architecture, will benefit most from this system improvement. No hardware needs to change in any adapter or server platform. And Intel DDIO is invisible to software: no driver, firmware, application, or system software changes are required to get the benefits of Intel DDIO. https://www.intel.com/content/dam/www/public/us/en/documents/faqs/data-direct-i-o-faq.pdf Yes, an FPGA Network Controller will benefit from DDIO if it is enabled on the device. Without knowing the details the architecture and purpose of the FPGA NIC it is difficult to quantify the benefit, completely offloading all state will see less benefits (i.e., in the case TOE TCP/IP Offload Engine) vs a "intelligent offload" where the TCP/IP control path is still maintained by the Operating environment, largely because the control path takes advantage of the scaling offer by the host side compute. Any questions, please let me know. Regards,Alberto R

[CWen6]

Alberto,

Thanks a lot for the info. Are you saying if TOE is used, the benefits of using DDIO will be minimum? Are there any technical documents regarding how to take advantage of DDIO?

[idata]

cwen: You are very welcome. Yes you are correct, if TOE is used, the benefits of using DDIO will be minimum. Unfortunately there are no documents available of how to take advantage of DDIO. Let me apologize for that.

Any questions, please let me know. Regards,Alberto R

[CWen6]

Hi Alberto,

We're trying to test DDIO with FPGA. Is there any way to tell whether DDIO is working? Is there any info of PCIe that we can check to confirm?

Thanks.

[idata]

cwen: In regard to your question, I will verify if that is possible, as soon as I confirm the answer, I will post the information on this thread.

Any questions, please let me know. Regards,Alberto R

[idata]

Hi cwen: I just gather the information you requested and DDIO is enabled by default on Intel® Xeon® processor E5 family and Intel® Xeon® processor E7 v2 family, so you can make sure that it is working. Unfortunately, there is no PCI info but you will be able to notice the benefit from Software tuning. On the link below you will find additional details about this matter:

https://www.intel.com/content/www/us/en/io/data-direct-i-o-faq.html https://www.intel.com/content/www/us/en/io/data-direct-i-o-faq.html Any questions, please let me know. Regards,Alberto R