What does green LOAD LED stands for on DE0-Nano Eval Board?

[FMutt1]

Hello,

I want to add the .hex output file of a simple NIOS II project into the download process of the bitstream in quartus. I already ​added the .qip file (necessary for memory initialization) to my quartus project. But the software isn't processed after programming. Programming and running the software via JTAG-UART works.

 I am using the Quartus Prime Lite Edtion 18.0. with the DEO-NANO development board (CYCLONE IV EP4CE22F17C6N as on board FPGA).

I recognized that when I am programming the software via the "eclipse studio for nios II" that the software starts without any problem and the green LOAD LED is shining. When I simple program the device with the bitstream, including the memory device file, the green LOAD LED is not shining. So can this be an indicator for my problem? What does this LED stands for? At the DE0-Nano Manual I didn't find the answer (https://www.ti.com/lit/ug/tidu737/tidu737.pdf) What can be the solution for my problem?

Thank you very much for your help

Best regards Florian​

[RRomano001]

On Terasic user manual all is addressed from design to uploading software, chapter 9 address NIOS executable file conversion to JIC and how to upload EPCS device.

Load led is part of embedded usb blaster, during JTAG access to NIOS is busy so it remain LIT and USB port locked.

When you just upload .sof it load FPGA ram lit for a short time then quit freeing up USB port too.

Manual where created for learning in mind.

Terasic DE10 has nothing to do with Quartus.

[FMutt1]

​Thanks for your fast response.

I generated a jic file described in chapter 9 and the download process itself resonse me to be successful. But the demo software is not triggered.

So do you have an idea what I can do to solve the described problem.

BR

[RRomano001]

I don't see enough details about to diagnose what can happen.

take last official user manual from Terasic site or ask them sending more details.

Regards

[AnandRaj_S_Intel]

Hi,

1. Power cycle the board after programming .jic.
2. Have you compiled Quartus design after including meminit.qip ?
3. Check the software bsp setting.

Regards

Anand

[FMutt1]

I included meminit.qip in comile process and I powered up board after programming. Are there any special bsp settings I have to do regarding this problem?

Regards Flo​

[AnandRaj_S_Intel]

​Hi Flo,

Default bsp setting should work. Check if we have liker region pointing to On-chip RAM.

Try to erase before programming EPCS.

Can you share the design or explain about you design?

Regards

Anand

[FMutt1]

​Hi Anand,

regarding https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd11192013_118.html the programming of EPCS is not supported in device family of Cyclone IV. So what can I do instead?

Actual I developed a simple LED blinking project on the Nios II and and running the software in the niosii eclipse studio works problemless. But for programming the software addional to the hardware bitstream to my device, i made the following steps:

1. Generating a hex file out of your elf by using mem_init_generate build option
2. Including meminit.qip and hex file into quartus project
3. Build process including the memory initialization files of step 2
4. Programming using .sof file

I attached my project. If you could review the project, that would be really nice.

Thank you very much previously

[AnandRaj_S_Intel]

Hi,

Check the attached the jic file once.

Let me know the status​

Regards

Anand

[AnandRaj_S_Intel]

Private message

"

Thank you very much for the jic file. It really works right now. Could you provide me your project as zip because I really have no idea what I have done wrong and it would be really useful to compare the projects.

Thank you very much previously

Best regards

Florian"

Hi @FMutt1​ ,

I have used project from DE0-Nano_v.1.2.4_SystemCD\Demonstration\myfirst_niosii and just compiled and generated the .jic file.

PFA with compiled design and .jic file.

Regards

Anand