single bit error in 7 bits ECC not detected, cyclone V FPGA.

[ABola2]

i have checked single bit ECC error detection and correction in SRAM IP.

Getting error during write into memory {via encoder logic} and detection shall happen on the read from memory {via decoder logic}. 

By injecting single bit error on 7 bit ECC and read the data, i do not see single bit error getting detected. 

[Fawaz_Al-Jubori]

Hello,

Please make sure there is no timing violations. there might be some rare cases where there is a corrupted memory location that might cause this issue.

thank you