Long latency during high-level synthesis

[aaa9]

The latency is as high as 100 or more when the following simple arithmetic circuit is high level synthesized. (The Makefile does not seem to be attachable as is, so I attach it in txt format.)
The report at the time of synthesis shows that the operation itself completes in about 2 CLKs, but it seems to take a lot of time for component calls and value input/output operations (RD, Exit).
Currently, hls_always_run_component is used, but when I remove it and run the simulation, it does not change significantly, and specifying CLK in the Makefile does not change it either.

How can I reduce the latency?
Or are these latencies specific to the testbench generated during high-level synthesis, and the actual circuit ends up with about 2 CLKs?

Qualtus version: pro 19.3 (linux)
Device used: stratix10

#include "HLS/hls.h"
#include <stdio.h>
#include "./calc.h"

int main() {
    input value1  = {1, 0.5};
    input value2  = {2, 1.5};
    output result;

    result = calc (value1, value2);
    
    printf("int_value = %ld, real_value = %lf \n", result.int_value, result.real_value);

    return 0;
}

#include "HLS/hls.h"
#include "./calc.h"

component hls_always_run_component hls_stall_free_return
output calc (input port1, input port2)
{
    long int_add;
    double real_add;
    output result;

    int_add  = port1.int_value  + port2.int_value;
    real_add = port1.real_value + port2.real_value;

    result.int_value  = int_add;
    result.real_value = real_add;

    return result;
}

[BoonBengT_Intel]

Hi @aaa9,

Thank you for posting in Intel community forum, hope all is well and apologies for the delayed in response.

Noted on the situation, we are in the middle of trying the example provided.

At the same time I would suggest to go through the example that comes with HLS.

The following example can be found in the path <quartus installation path>/hls\examples\tutorials\ac_datatypes.

Mention example above would be similar to your mention scenario.

Hope that clarify.

Best Wishes

BB

[BoonBengT_Intel]

Hi @aaa9,

Good day, just following up on the previous clarification.

By any chances did you managed to look into the example design, as suspecting there might be a datatype provlem with the example provided. 

Hope to hear from you soon.

Best Wishes

BB

[BoonBengT_Intel]

Hi @aaa9,

Greetings, as we do not receive any further clarification/updates on the matter, hence would assume challenge are overcome. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. For new queries, please feel free to open a new thread and we will be right with you. Pleasure having you here.

Best Wishes

BB